Patents by Inventor Kouros Azimi

Kouros Azimi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7429502
    Abstract: An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: September 30, 2008
    Assignee: Agere Systems, Inc.
    Inventors: Vance D. Archer, III, Kouros Azimi, Daniel Patrick Chesire, Warren K Gladden, Seung H. Kang, Taeho Kook, Sailesh M. Merchant, Vivian Ryan
  • Publication number: 20080191766
    Abstract: Disclosed is a circuit that adjusts a characteristic of a signal transmitted from a transmitter to a receiver over a communication channel (e.g., a wire, a backplane, etc.). The circuit includes a latch that receives the signal at a predetermined point in the circuit and samples a voltage of the signal many times after a threshold voltage is applied to the latch. The circuit also includes a processor that determines the characteristic of the signal when the sampled voltages indicate a transition point and that adjusts the threshold voltage when the sampled voltages do not indicate a transition point. The processor adjusts the characteristic of the signal by adjusting at least one of a current and a voltage of the transmitter when the characteristic of the signal is outside a predetermined range.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 14, 2008
    Inventors: Kouros Azimi, Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith
  • Publication number: 20080191669
    Abstract: Disclosed is a circuit for adjusting a voltage supplied to an IC by a power supply. The circuit includes a PVT detector configured to generate a control signal and an adjustable resistance device configured to adjust its resistance in response to the control signal.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 14, 2008
    Inventors: Kouros Azimi, Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith
  • Patent number: 7327029
    Abstract: An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: February 5, 2008
    Assignee: Agere Systems, Inc.
    Inventors: Vance D. Archer, III, Kouros Azimi, Daniel Patrick Chesire, Warren K Gladden, Seung H. Kang, Taeho Kook, Sailesh M. Merchant, Vivian Ryan
  • Publication number: 20080026508
    Abstract: An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
    Type: Application
    Filed: October 8, 2007
    Publication date: January 31, 2008
    Applicant: Agere Systems Inc.
    Inventors: Vance Archer, Kouros Azimi, Daniel Chesire, Warren Gladden, Seung Kang, Taeho Kook, Sailesh Merchant, Vivian Ryan
  • Patent number: 7202782
    Abstract: The present invention provides an apparatus and method for detecting if a person has attempted to tamper with an integrated circuit (IC). The apparatus is located on the IC and comprises detection circuitry that detects a build up of electrical charge on the IC and disablement circuitry that disables the IC when the detection circuitry detects a build up of electrical charge on the IC. The method comprises detecting if a build up of electrical charge on the IC has occurred and disabling the IC when a build up of electrical charge on the IC has been detected.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: April 10, 2007
    Assignee: Agere Systems Inc.
    Inventors: Kultaransingh N. Hooghan, James T. Cargo, Charles W. Berthoud, Scott W. McLellan, Kouros Azimi
  • Patent number: 7199651
    Abstract: A variable capacitance circuit on an integrated circuit comprises a MOS transistor, and a capacitance multiplier connected to one end of a channel of the MOS device. A MOS device is formed in series with an inductance, and a capacitance multiplier is formed to be connected to a node between the MOS device and the inductance.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: April 3, 2007
    Assignee: Agere Systems Inc.
    Inventors: Kouros Azimi, Thaddeus John Gabara
  • Publication number: 20070069368
    Abstract: An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
    Type: Application
    Filed: September 27, 2005
    Publication date: March 29, 2007
    Inventors: Vance Archer, Kouros Azimi, Daniel Chesire, Warren Gladden, Seung Kang, Taeho Kook, Sailesh Merchant, Vivian Ryan
  • Publication number: 20060194574
    Abstract: Communication techniques are provided. For example, in one aspect, a communication method comprises the step of inputting information, at the time of placing of a telephone call, that directs a receiving telephone to produce one or more of a plurality of incoming call indicators. The incoming call indicator, which may comprise a particular ring tone, can be used to signify one or more of an identity of a caller, a nature of the call and an importance of the call.
    Type: Application
    Filed: February 28, 2005
    Publication date: August 31, 2006
    Inventors: Kouros Azimi, Roger Fratti
  • Publication number: 20060187024
    Abstract: A portable security system includes a portable wireless link and a portable motion sensor, which is adapted to receive control signals from the portable wireless link, and which is adapted to communicate a signal when a security breach occurs. A method of providing security is also described.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 24, 2006
    Inventors: Kouros Azimi, John Michejda, Scott McLellan
  • Publication number: 20060103456
    Abstract: A variable capacitance circuit on an integrated circuit comprises a MOS transistor, and a capacitance multiplier connected to one end of a channel of the MOS device. A MOS device is formed in series with an inductance, and a capacitance multiplier is formed to be connected to a node between the MOS device and the inductance.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Kouros Azimi, Thaddeus Gabara
  • Publication number: 20060103893
    Abstract: A cellular phone contains a scanner feature for scanning documents directly into a cell phone. The cell phone may scan a small document (e.g., a business card) or a much larger: document (e.g., multiple pages of standard 8½?×11? paper.). Business card scanning can include a feature to automatically enter data into a contact list, which is then synchronized with a host PC. The particular scanning and stitching methods disclosed in a cell phone are capable of scanning objects that are virtually limitless in size and/or shape, making use of even a low resolution camera integrated into many currently available cell phones. In first embodiments, the disclosed scanner makes use of an external scanner interfaced directly to a digital port of a cell phone, and in second embodiments, the scanner uses a low resolution internal camera to capture images of matrixed portions of a larger object or document.
    Type: Application
    Filed: November 15, 2004
    Publication date: May 18, 2006
    Inventors: Kouros Azimi, John Michejda
  • Publication number: 20060028340
    Abstract: The present invention provides an apparatus and method for detecting if a person has attempted to tamper with an integrated circuit (IC). The apparatus is located on the IC and comprises detection circuitry that detects a build up of electrical charge on the IC and disablement circuitry that disables the IC when the detection circuitry detects a build up of electrical charge on the IC. The method comprises detecting if a build up of electrical charge on the IC has occurred and disabling the IC when a build up of electrical charge on the IC has been detected.
    Type: Application
    Filed: August 4, 2004
    Publication date: February 9, 2006
    Inventors: Kultaransingh Hooghan, James Cargo, Charles Berthoud, Scott McLellan, Kouros Azimi
  • Publication number: 20060019645
    Abstract: A set of usage rules are implemented to disable particular features of a wireless device (e.g., audible ringing, use of camera, etc.), or to forcibly power down the device, based upon it's presence in an area with restricted usage rules. A number of BLUETOOTH™ enabled or other suitably enabled devices such as a cell phones, personal digital assistant (PDA), pager, and email device such as a BLACKBERRY™ or SMARTPHONE™ device, may be automatically instructed to enact one or more rules provided by a Rules Enforcer Transceiver. A “Rules Enabled” cell phone or other wireless device thus may be taken into sensitive areas such as hospitals, movie theatres, etc. For instance, audible ringing may be disabled (or, alternatively, silent ringing such as vibration may be forcibly enabled.) Similarly, camera functionality may be disabled when entering given establishments that prohibit use of such devices, e.g., health clubs, spas, or corporate offices to prevent industrial espionage, etc.
    Type: Application
    Filed: July 20, 2004
    Publication date: January 26, 2006
    Inventors: Kouros Azimi, John Michejda, H. Fetterman
  • Patent number: 6259311
    Abstract: A highly accurate tuning circuit for a tunable filter is provided which trims an RC time constant based on variances in both a formed capacitive component as well as variances in formed resistive components. A capacitor and resistor based tuning control circuit includes both a formed capacitor based tuning reference current generator and a formed resistor based tuning voltage reference generator. Each generates a voltage reference which is compared to the other to determine control signals for tuning a tunable resistive component forming the resistive portion of the RC time constant of the relevant filter. The resistive component is tuned by shorting selective resistors in the tunable resistive component.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: July 10, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: Kouros Azimi, Dale Harvey Nelson
  • Patent number: 6239510
    Abstract: An apparatus and method for reducing variations in a supply voltage signal. The voltage signal which powers a circuit is regulated by adding or removing a series of redundant loads to the circuit. The redundant loads are normally not connected to the circuit. However, when one of the loads of the circuit is switched out of the circuit, one or more of the redundant loads are switched into the circuit, and then removed gradually from the circuit. When one of the loads of the circuit is to be switched into the circuit, one or more of the redundant loads are switched into the circuit first, then switched out of the circuit when the load is switched in. Thus, the voltage supply sees almost the same load during a turn-on and turn-off transition period, and variations in the voltage signal are reduced.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: May 29, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Kouros Azimi, Bahram G. Kermani, Jonathan H. Fischer
  • Patent number: 6163183
    Abstract: A multifunction reset circuit including low power bandgap, a comparator, and an open drain buffer circuit--with the inclusion of four external components (three resistors and one capacitor) to provide undervoltage monitoring, power failure indicating, manual resetting and other reset control conditions to a single integrated circuit terminal, together with hysteresis tolerance.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: December 19, 2000
    Assignee: Lucent Technologies, Inc
    Inventors: Kouros Azimi, Zhigang Ma, Dale H. Nelson, Brian J. Petryna, Oceager P. Yee
  • Patent number: 6160446
    Abstract: An integrated circuit comprising a balanced differential amplifier. The balanced differential amplifier has a first single-ended differential amplifier coupled at a first negative differential input terminal to a first input signal through a feedback network also coupled to an output terminal of the first amplifier. The first amplifier is also coupled at a first positive differential input terminal to a second input signal through a first resistor and to a reference voltage. The balanced differential amplifier also has a second single-ended differential amplifier coupled at a second negative differential input terminal to the second input signal through a second feedback network also coupled to an output terminal of the second amplifier. The second amplifier is also coupled at a second positive differential input terminal to the first input signal through a second resistor and to the reference voltage.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: December 12, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Kouros Azimi, Dale Harvey Nelson, Tseng-Nan Tsai