Abstract: In a conventional semiconductor device, to effectively improve a toggling coefficient of a memory circuit, a test pattern and the like must be inputted from the outside, and there has been a problem that it is difficult to improve the toggling coefficient in a dynamic BT unless a high capability device is used. A test control circuit 4 according to the present invention detects the termination of a memory test executed by a BIST circuit 2A, and comprises a detector 12 for outputting a reset signal and a BIST circuit controller 13 for allowing the BIST circuit 2A to be repeatedly operated based on the reset signal.