Patents by Inventor Kousaku Uoya

Kousaku Uoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of fabricating semiconductor device
    Patent number: 8110443
    Abstract: A method of fabricating a semiconductor device from a semiconductor wafer, having external connecting terminals on one side of the semiconductor wafer and a cover layer on another side of the semiconductor wafer, includes forming a groove with a first width from the one side to at least an interface between the semiconductor wafer and the cover layer in the semiconductor wafer, and cutting the cover layer with a second width from a bottom side of the groove. The second width is narrower than the first width.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: February 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Kousaku Uoya
  • Semiconductor device and method of fabricating semiconductor device
    Publication number: 20110039396
    Abstract: A method of fabricating a semiconductor device from a semiconductor wafer, having external connecting terminals on one side of the semiconductor wafer and a cover layer on another side of the semiconductor wafer, includes forming a groove with a first width from the one side to at least an interface between the semiconductor wafer and the cover layer in the semiconductor wafer, and cutting the cover layer with a second width from a bottom side of the groove. The second width is narrower than the first width.
    Type: Application
    Filed: October 19, 2010
    Publication date: February 17, 2011
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kousaku Uoya
  • Semiconductor device and method of fabricating semiconductor device
    Patent number: 7859097
    Abstract: A semiconductor device including a semiconductor chip having external connecting terminals formed on one side is restrained to cause chipping in ridge line portion of semiconductor chip. A cover layer 103 is formed on the other side of the semiconductor chip 102. At least a part of an end portion 106 of the cover layer is outside of the ridge line portion 107 of the semiconductor chip.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventor: Kousaku Uoya
  • Semiconductor device and method of fabricating semiconductor device
    Publication number: 20090102042
    Abstract: A semiconductor device including a semiconductor chip having external connecting terminals formed on one side is restrained to cause chipping in ridge line portion of semiconductor chip. A cover layer 103 is formed on the other side of the semiconductor chip 102. At least a part of an end portion 106 of the cover layer is outside of the ridge line portion 107 of the semiconductor chip.
    Type: Application
    Filed: October 14, 2008
    Publication date: April 23, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Kousaku Uoya