Patents by Inventor Kousei Maemura
Kousei Maemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7400202Abstract: A bias circuit includes a resistor in parallel with a voltage-drive bias circuit including a GaAs-HBT transistor. This configuration ensures that a current can be supplied from a reference voltage input terminal to the base terminal of a first transistor via the resistor in an idling state in which a voltage applied to the base terminal is lower than a voltage at which a second transistor operates, thereby enabling a desired amplifying operation while maintaining the idling current generally constant in a temperature range, even when the reference voltage is reduced to a value lower than twice the barrier voltage of the GaAs HBT.Type: GrantFiled: October 25, 2006Date of Patent: July 15, 2008Assignee: Mitsubishi Electric CorporationInventors: Kazuya Yamamoto, Kousei Maemura
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Publication number: 20070115062Abstract: A bias circuit includes a resistor in parallel with a voltage-drive bias circuit including GaAs-HBT transistor. This configuration ensures that a current can be supplied from a reference voltage input terminal to the base terminal of a first transistor via the resistor in an idling state in which a voltage applied to the base terminal is lower than a voltage at which a second transistor operates, thereby enabling a desired amplifying operation while maintaining the idling current generally constant in a temperature range, even when the reference voltage is reduced to a value lower than twice the barrier voltage of the GaAs HBT.Type: ApplicationFiled: October 25, 2006Publication date: May 24, 2007Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Kazuya YAMAMOTO, Kousei MAEMURA
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Patent number: 6861906Abstract: A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.Type: GrantFiled: May 11, 2001Date of Patent: March 1, 2005Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazutomi Mori, Shintaro Shinjo, Kousei Maemura, Teruyuki Shimura, Kazuhiko Nakahara, Tadashi Takagi
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Patent number: 6750718Abstract: Base biases that are supplied to an RF transistor when the RF transistor is in high output power operation and in low output power operation, respectively, are supplied from different voltage sources. When an amplifier is in high output power operation, a base bias is output from a bias circuit unit. At this time, the RF transistor operates at a constant voltage based on the bias that is output from the bias circuit unit. When the amplifier is in low output power operation, a base bias is supplied from a reference voltage terminal via a resistor. This makes it possible to decrease variation in base bias voltage. When the amplifier is in low output power operation, operation of the bias circuit unit is prohibited and hence no current is consumed in the bias circuit unit, whereby efficiency of the amplifier is increased.Type: GrantFiled: November 26, 2002Date of Patent: June 15, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takao Moriwaki, Kousei Maemura
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Publication number: 20040004518Abstract: Base biases that are supplied to an RF transistor when the RF transistor is in high output power operation and in low output power operation, respectively, are supplied from different voltage sources. When an amplifier is in high output power operation, a base bias is output from a bias circuit unit. At this time, the RF transistor performs a constant voltage operation based on the bias that is output from the bias circuit unit. When the amplifier is in low output power operation, a base bias is supplied from a reference voltage terminal via a resistor. This makes it possible to decrease a variation in base bias voltage. When the amplifier is in low output power operation, operation of the bias circuit unit is prohibited and hence no current is consumed in the bias circuit unit, whereby an efficiency of the amplifier can be increased.Type: ApplicationFiled: November 26, 2002Publication date: January 8, 2004Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Takao Moriwaki, Kousei Maemura
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Publication number: 20030011435Abstract: A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.Type: ApplicationFiled: September 3, 2002Publication date: January 16, 2003Inventors: Kazutomi Mori, Shintaro Shinjo, Kousei Maemura, Teruyuki Shimura, Kazuhiko Nakahara, Tadashi Takagi
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Patent number: 5818278Abstract: A level shift circuit shifting logic levels of an SCFL circuit to logic levels of a DCFL circuit, including an SCFL circuit having complementary outputs; two source follower circuits with their inputs respectively connected to the complementary outputs of the SCFL circuit; a high/low detecting circuit detecting "high" or "low" signals which have DCFL levels from the two source follower circuits and outputting signals having logic levels according to the detection results; and DCFL circuits with inputs connected to outputs of the high/low detecting circuit. Therefore, it is possible to obtain a level shift circuit operating with a wider voltage range and in a wider temperature range than the prior art circuit.Type: GrantFiled: March 3, 1997Date of Patent: October 6, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazuya Yamamoto, Kousei Maemura
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Patent number: 5751181Abstract: A power amplifier circuit includes a first field effect transistor power amplifier having a gate; a gate voltage supply for supplying a gate voltage to the gate of the first field effect transistor; and a gate voltage control including a second field effect transistor which has the same threshold voltage as the first field effect transistor. The gate voltage control receives, as an input voltage, the gate voltage output from the gate voltage supply, and increases the gate voltage when the gate voltage is lower than the threshold voltage of the first field effect transistor, preventing the first field effect transistor from being pinched off. Therefore, when the pinch-off voltage of the first field effect transistor varies or when the voltage supplied from the gate voltage supply varies, unwanted pinch-off of the first field effect transistor is avoided in the lower power consumption state so that the stability of the circuit is improved.Type: GrantFiled: February 7, 1997Date of Patent: May 12, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kousei Maemura, Kazuya Yamamoto
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Patent number: 5367271Abstract: A quadrature modulator includes a 0.degree./90.degree. phase shifter including only resistors, capacitors, and transistors that separates an input carrier wave into two carrier waves having a phase difference of 90.degree. from each other by differentiating and integrating. The quadrature modulator includes amplitude compensating circuits for converting the two carrier waves from sinusoidal waveforms to rectangular waveforms having predetermined amplitudes. The amplitude compensating circuits are inserted between the phase shifter and double-balanced mixers. The phase shifter consists of circuit elements appropriate for circuit integration and produces a high degree of orthogonality in its output signals as a function of variations in the characteristic values of the circuit elements. Complementary carriers having precise orthogonality as well as superior balance are input to double-balanced mixers.Type: GrantFiled: October 1, 1993Date of Patent: November 22, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazuya Yamamoto, Kousei Maemura
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Patent number: 5173622Abstract: A semiconductor integrated circuit formed of a source coupled type logic circuit including a field effect transistor switching a circuit in response to an input signal and a current controlling circuit for controlling the input signal current connected in series between the input terminal and the gate of the field effect transistor. Since an element for limiting current is provided at the input, current is prevented from flowing into the circuit but the voltage of the input signal is sent to the circuit. As a result, the power consumption and the size of the circuit are reduced.Type: GrantFiled: March 13, 1991Date of Patent: December 22, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Kousei Maemura
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Patent number: 5172400Abstract: A frequency divider includes at least three master-slave flip-flops which are connected to each other in stages, each stage including a master flip-flop and a slave flip-flop, to construct a 1/N frequency divider. At least two outputs whose periods are the same but phases are different are taken out from a master flip-flop and a slave flip-flop and combined to obtain a 1/(N/2) divided output signal. As a result, a divided output signal whose period does not vary with time is obtained and, when the N is an even number, an output signal with a duty ratio of 1/2 is obtained. A pulse signal former includes a differential amplifier to which two signals whose periods and pulse widths are the same but phases are shifted by a pulse width and an output obtained by comparing those two signals is output from the pulse signal former. As a result, an output signal whose duty ratio is 1/2 is obtained.Type: GrantFiled: April 3, 1991Date of Patent: December 15, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Kousei Maemura
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Patent number: 5163169Abstract: A frequency divider circuit including a field effect transistor on a semi-insulating substrate including applying a voltage higher than the lowest of the power supply voltages of the frequency divider circuit to the semi-insulating substrate.Type: GrantFiled: December 22, 1989Date of Patent: November 10, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kousei Maemura, Teruyuki Shimura, Hiroaki Seki
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Patent number: 5086441Abstract: A frequency divider circuit having N flip-flops connected in series, includes a logic circuit for monitoring at least one of the outputs of the N flip-flops and halting the frequency division operation of a prior stage flip-flop when the value of the output which is monitored is equal to a predetermined value when a reset signal is input, and restarting frequency division operation when the reset signal is cancelled.Type: GrantFiled: February 26, 1990Date of Patent: February 4, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kousei Maemura, Hiroichi Ishida