Patents by Inventor Koushi UEMURA

Koushi UEMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10944926
    Abstract: A solid-state imaging element of the present disclosure includes a pixel array unit in which unit pixels each including a photoelectric conversion unit are arranged two-dimensionally in a matrix, and a floating diffusion is shared between a plurality of the unit pixels, and a drive unit that drives to discard, into the floating diffusion, a part of a charge of a non-read pixel sharing the floating diffusion with a read pixel, during a reset period of the floating diffusion of the read pixel for reading the charge.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: March 9, 2021
    Assignee: SONY CORPORATION
    Inventors: Koushi Uemura, Shingo Sanada, Kiyoshige Tsuji, Hideyuki Hanada
  • Publication number: 20200045253
    Abstract: A solid-state imaging element of the present disclosure includes: a pixel array unit in which unit pixels each including a photoelectric conversion unit are arranged two-dimensionally in a matrix, and a floating diffusion is shared between a plurality of the unit pixels; and a drive unit that drives to discard, into the floating diffusion, a part of a charge of a non-read pixel sharing the floating diffusion with a read pixel, during a reset period of the floating diffusion of the read pixel for reading the charge.
    Type: Application
    Filed: August 16, 2017
    Publication date: February 6, 2020
    Inventors: KOUSHI UEMURA, SHINGO SANADA, KIYOSHIGE TSUJI, HIDEYUKI HANADA
  • Patent number: 10021332
    Abstract: The present disclosure relates to: an imaging element and an imaging-element drive method which enable negative-voltage fluctuation to be suppressed without increasing negative-voltage capacitance; an electronic device; and a program. A dual circuit is prepared for negative voltages. At times other than during exposure and reset, the negative voltage is supplied to readout transistors in lines other than a readout line. At timings other than these times, the negative voltage is supplied to the aforementioned readout transistors. Accordingly, even if the negative voltage fluctuates during exposure and reset, a stable negative voltage is supplied at timings at which other pixel data is read out, and thus fluctuation is suppressed. The present disclosure is applicable to imaging elements.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 10, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Koushi Uemura
  • Publication number: 20170127004
    Abstract: The present disclosure relates to: an imaging element and an imaging-element drive method which enable negative-voltage fluctuation to be suppressed without increasing negative-voltage capacitance; an electronic device; and a program. A dual circuit is prepared for negative voltages. At times other than during exposure and reset, the negative voltage is supplied to readout transistors in lines other than a readout line. At timings other than these times, the negative voltage is supplied to the aforementioned readout transistors. Accordingly, even if the negative voltage fluctuates during exposure and reset, a stable negative voltage is supplied at timings at which other pixel data is read out, and thus fluctuation is suppressed. The present disclosure is applicable to imaging elements.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 4, 2017
    Inventor: Koushi UEMURA