Abstract: For predicting timing violations, a prediction module predicts a timing violation for a first instruction in a semiconductor device in response to use by the first instruction of a specified sensitized path. The prediction module further mitigates the predicted timing violation.

Abstract: Circuit floorplanning is performed on a combination central processing unit and multiprocessor. A B*-tree data structure of a floorplan and circuit related constants reside in a central processing unit data storage. The B* tree structure of a floorplan along and said circuit related constants are copied to a multiprocessor data storage where multiple thread blocks, each consisting of a single thread, copy the tree to their own shared memories. The multiprocessor concurrently evaluates different moves in different thread blocks. The multiprocessor then evaluates objective function results and stores those results. The best result for floorplanning is selected from the multiple circuit evaluations.

Abstract: For aging-aware routing, an aging module calculates an aging score for links and routers in a Network-on-Chip for a previous epoch. A routing module dynamically routes a flow through the links and the routers to satisfy routing criteria including a least total aging score for the links and the routers of the flow.

Abstract: For multicore power performance management, a first core has a first architecture and is designed for a first voltage-frequency domain. A second core has the first architecture and that is designed for a second voltage-frequency domain.

Abstract: Circuit floorplanning is performed on a combination central processing unit and multiprocessor. A B*-tree data structure of a floorplan and circuit related constants reside in a central processing unit data storage. The B* tree structure of a floorplan along and said circuit related constants are copied to a multiprocessor data storage where multiple thread blocks, each consisting of a single thread, copy the tree to their own shared memories. The multiprocessor concurrently evaluates different moves in different thread blocks. The multiprocessor then evaluates objective function results and stores those results. The best result for floorplanning is selected from the multiple circuit evaluations.

Abstract: An over-provisioned multicore processor employs more cores than can simultaneously run within the power envelope of the processor, enabling advanced processor control techniques for more efficient workload execution, despite significantly decreasing the duty cycle of the active cores so that on average a full core or more may not be operating.

Abstract: An over-provisioned multicore processor employs more cores than can simultaneously run within the power envelope of the processor, enabling advanced processor control techniques for more efficient workload execution, despite significantly decreasing the duty cycle of the active cores so that on average a full core or more may not be operating.