Patents by Inventor Kousuke Kusakari

Kousuke Kusakari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fabrication method for semiconductor integrated circuit device
    Patent number: 7375037
    Abstract: To improve the shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: May 20, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro
  • Fabrication method for semiconductor integrated circuit device
    Publication number: 20040033692
    Abstract: To improve the shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Application
    Filed: August 13, 2003
    Publication date: February 19, 2004
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro
  • Fabrication method for semiconductor integrated circuit devices and semiconductor integrated circuit device
    Patent number: 6633072
    Abstract: To improve the shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 14, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro
  • Fabrication method for semiconductor integrated circuit devices and semiconductor integrated circuit device
    Patent number: 6479392
    Abstract: To improve the shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: November 12, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro
  • Fabrication method for semiconductor integrated circuit devices and semiconductor integrated circuit device
    Publication number: 20020014662
    Abstract: To improve a shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Application
    Filed: March 19, 2001
    Publication date: February 7, 2002
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro
  • Fabrication method for semiconductor integrated circuit devices and semiconductor integrated circuit device
    Publication number: 20010028093
    Abstract: To improve a shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3 gas. Thereby, the gate electrode 15G can be formed without causing side etching at two side faces (SiGe layer 15b) of the gate electrode 15G.
    Type: Application
    Filed: March 20, 2001
    Publication date: October 11, 2001
    Inventors: Kazuo Yamazaki, Shinji Kuniyoshi, Kousuke Kusakari, Takenobu Ikeda, Masahiro Tadokoro