Abstract: A method of forming a shallow trench isolation, includes the steps, in sequence, of (a) forming a mask pattern on a silicon substrate, the mask pattern being made of a silicon dioxide layer and a silicon nitride layer, (b) forming a trench in the silicon substrate with the mask pattern being used as a mask, (c) forming a first silicon dioxide film covering an inner surface of the trench such that the trench is not filled with the first silicon dioxide film, (d) heating the first silicon dioxide film, (e) forming a second silicon dioxide film over a product resulted from the step (d) such that the trench is filled with the second silicon dioxide film, (f) heating the second silicon dioxide film, (g) polishing the first and second silicon dioxide films through the use of the silicon nitride layer as a stopper, (h) etching the silicon nitride layer for removal, and (i) etching the first and second silicon dioxide films such that the first and second silicon dioxide films are on a level with a surface of the sili

Abstract: Upon fabrication of semiconductor devices, a semiconductor substrate is subjected to ion implantation with high energy. Subsequent annealing of the ion-implanted semiconductor substrate, when conducted by heating the substrate to a temperature of from 1,000° C. to 1,200° C. at a ramp-up rate of at least 200° C./sec, makes it possible to provide the resulting semiconductor devices with smaller leakage currents of reduced variations (&sgr;/X). The present invention can therefore provide a process for the fabrication of semiconductor devices featuring both smaller leakage currents and reduced variations of the leakage currents even when ion implantation is conducted with high energy.

Abstract: Upon fabrication of semiconductor devices, a semiconductor substrate is subjected to ion implantation with high energy. Subsequent annealing of the ion-implanted semiconductor substrate, when conducted by heating the substrate to a temperature of from 1,000° C. to 1,200° C. at a ramp-up rate of at least 200° C./sec, makes it possible to provide the resulting semiconductor devices with smaller leakage currents of reduced variations (&sgr;/X). The present invention can therefore provide a process for the fabrication of semiconductor devices featuring both smaller leakage currents and reduced variations of the leakage currents even when ion implantation is conducted with high energy.

Abstract: A method of manufacturing a semiconductor device has a step whereby, when forming a gate oxide film, a thin oxide film is left on a silicon substrate onto which it is formed and whereby a heavy metal at the surface of the silicon substrate is diffused into the substrate, and a step of forming a gate oxide film onto the silicon substrate.

Abstract: Disclosed herein is, a method of forming a metal wiring on a semiconductor substrate dry etching a metal wiring film or a laminated structure film comprising a metal wiring film and a metal barrier film, which includes a first step of performing etching to a metal wiring film and a second dry etching step of overetching the metal wiring film or the metal barrier film under such a condition that the residence time of a gas in an etching chamber in the second dry etching step is shorter than a residence time of a gas in the first etching step.

Abstract: An apparatus for dry etching includes a vacuum chamber into which an etching gas is to be introduced, an electrode disposed in the vacuum chamber, a material to be etched being placed on an upper surface of the electrode, at least one cylindrical ring disposed around the material, and a device for raising and lowering the rings so that the rings are raised above or lowered below the upper surface of the electrode.