Patents by Inventor Kousuke Tsuji

Kousuke Tsuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9776280
    Abstract: A laser welding method is capable of easily restraining poor welding when spatters adhere to a protective glass of an optical system. The laser welding method includes a step of calculating a decrease-amount of the laser power before laser welding is performed by irradiating a welding portion of a workpiece with the laser beam having a predetermined power. The step of calculating the decrease-amount includes irradiating the welding portion with an inspecting laser beam having a power smaller than the predetermined power, receiving a return beam of the inspecting laser beam, measuring an intensity of the return beam, and comparing the intensity of the return beam with a standard intensity to calculate an amount of decrease in power of the inspecting laser beam at the welding portion.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: October 3, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shuhei Ogura, Kazuyuki Ogusu, Jyunichiro Makino, Hiroaki Kishi, Kousuke Tsuji
  • Publication number: 20160136756
    Abstract: A laser welding method is capable of easily restraining poor welding when spatters adhere to a protective glass of an optical system. The laser welding method includes a step of calculating a decrease-amount of the laser power before laser welding is performed by irradiating a welding portion of a workpiece with the laser beam having a predetermined power. The step of calculating the decrease-amount includes irradiating the welding portion with an inspecting laser beam having a power smaller than the predetermined power, receiving a return beam of the inspecting laser beam, measuring an intensity of the return beam, and comparing the intensity of the return beam with a standard intensity to calculate an amount of decrease in power of the inspecting laser beam at the welding portion.
    Type: Application
    Filed: November 6, 2015
    Publication date: May 19, 2016
    Inventors: Shuhei OGURA, Kazuyuki OGUSU, Jyunichiro MAKINO, Hiroaki KISHI, Kousuke TSUJI
  • Patent number: 7089525
    Abstract: The number of design processes for fabricating semiconductor devices can be reduced by parallel connection of a plurality of unit bipolar transistors Qu that are completely electrically isolated from each other in a semiconductor layer of an SOI substrate 1 to form a bipolar transistor having a large current capacity.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: August 8, 2006
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yoichi Tamaki, Takayuki Iwasaki, Kousuke Tsuji, Chiyoshi Kamada
  • Publication number: 20040079996
    Abstract: The number of design processes for fabricating semiconductor devices can be reduced by parallel connection of a plurality of unit bipolar transistors Qu that are completely electrically isolated from each other in a semiconductor layer of an SOI substrate 1 to form a bipolar transistor having a large current capacity.
    Type: Application
    Filed: October 21, 2003
    Publication date: April 29, 2004
    Applicant: Hitachi, Ltd. and Hitachi ULSI Systems Co., Ltd.
    Inventors: Yoichi Tamaki, Takayuki Iwasaki, Kousuke Tsuji, Chiyoshi Kamada
  • Patent number: 6662344
    Abstract: The number of design processes for fabricating semiconductor devices can be reduced by parallel connection of a plurality of unit bipolar transistors Qu that are completely electrically isolated from each other in a semiconductor layer of an SOI substrate 1 to form a bipolar transistor having a large current capacity.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: December 9, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yoichi Tamaki, Takayuki Iwasaki, Kousuke Tsuji, Chiyoshi Kamada
  • Publication number: 20020149084
    Abstract: The number of design processes for fabricating semiconductor devices can be reduced by parallel connection of a plurality of unit bipolar transistors Qu that are completely electrically isolated from each other in a semiconductor layer of an SOI substrate 1 to form a bipolar transistor having a large current capacity.
    Type: Application
    Filed: March 8, 2002
    Publication date: October 17, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Yoichi Tamaki, Takayuki Iwasaki, Kousuke Tsuji, Chiyoshi Kamada