Patents by Inventor Kousuke Yoshioka

Kousuke Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7716391
    Abstract: A data transfer apparatus according to the present invention has; a DMAC and another DMAC which transfer data by direct memory access among a plurality of buses; a command queue which holds, as a queue, commands for instructing the data transfer; a bus information obtainment unit which obtains the commands from the command queue; a grouping unit which groups the held commands, based on a source and a destination designated in each of the obtained commands; a schedule unit which decides an order of issuing the commands sequentially from a group having more command, as a priority; and a selector which selects a command to be issued according to the decided order.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 11, 2010
    Assignee: Panasonic Corporation
    Inventors: Kazuya Furukawa, Nobuo Higaki, Hideyo Tsuruta, Kazushi Kurata, Shigeki Fujii, Kousuke Yoshioka, Hiroyuki Morishita
  • Patent number: 7430801
    Abstract: This connector assembly comprises a header 1 to which a plurality of coaxial cables 3 are connectable and a socket 2 configured to be mounted on a printed board 4. The header 1 can be detachably coupled to the socket 2. The header 1 has a first terminal array 12 to which the coaxial cables 3 are electrically connectable. The socket 2 has a second terminal array 21 which makes contact with the first terminal array 12 when the header 1 is coupled to the socket 2. The first terminal array has a plurality of first terminals each having a wire terminal 120 for connection with each conductive wire of the cables and a contact 122 for contact with the second terminal array. The feature of the present invention resides in that the wire terminals 120 are arranged in a line, and the contacts 122 of the first terminal array are arranged in two rows in a staggered configuration, and a pitch of the contacts 122 of each row is larger than a pitch of the wire terminals 120.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: October 7, 2008
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Mitsuru Iida, Hirohisa Tanaka, Kenji Jounen, Kousuke Yoshioka
  • Publication number: 20080014785
    Abstract: This connector assembly comprises a header 1 to which a plurality of coaxial cables 3 are connectable and a socket 2 configured to be mounted on a printed board 4. The header 1 can be detachably coupled to the socket 2. The header 1 has a first terminal array 12 to which the coaxial cables 3 are electrically connectable. The socket 2 has a second terminal array 21 which makes contact with the first terminal array 12 when the header 1 is coupled to the socket 2. The first terminal array has a plurality of first terminals each having a wire terminal 120 for connection with each conductive wire of the cables and a contact 122 for contact with the second terminal array. The feature of the present invention resides in that the wire terminals 120 are arranged in a line, and the contacts 122 of the first terminal array are arranged in two rows in a staggered configuration, and a pitch of the contacts 122 of each row is larger than a pitch of the wire terminals 120.
    Type: Application
    Filed: September 12, 2007
    Publication date: January 17, 2008
    Applicant: MATSUSHITA ELECTRIC WORKS, LTD.
    Inventors: Mitsuru Iida, Hirohisa Tanaka, Kenji Jounen, Kousuke Yoshioka
  • Patent number: 7273390
    Abstract: This connector assembly comprises a header 1 to which a plurality of coaxial cables 3 are connectable and a socket 2 configured to be mounted on a printed board 4. The header 1 can be detachable coupled to the socket 2. The header 1 has a first terminal array 12 to which the coaxial cables 3 are electrically connectable. The socket 2 has a second terminal array 21 which makes contact with the first terminal array 12 when the header 1 is coupled to the socket 2. The first terminal array has a plurality of first terminals each having a wire terminal 120 for connection with each conductive wire of the cables and a contact 122 for contact with the second terminal array. The feature of the present invention resides in that the wire terminals 120 are arranged in a line, and the contacts 122 of the first terminal array are arranged in two rows in a staggered configuration, and a pitch of the contacts 122 of each row is larger than a pitch of the wire terminals 120.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: September 25, 2007
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Mitsuru Iida, Hirohisa Tanaka, Kenji Jounen, Kousuke Yoshioka
  • Publication number: 20060276075
    Abstract: This connector assembly comprises a header 1 to which a plurality of coaxial cables 3 are connectable and a socket 2 configured to be mounted on a printed board 4. The header 1 can be detachably coupled to the socket 2. The header 1 has a first terminal array 12 to which the coaxial cables 3 are electrically connectable. The socket 2 has a second terminal array 21 which makes contact with the first terminal array 12 when the header 1 is coupled to the socket 2. The first terminal array has a plurality of first terminals each having a wire terminal 120 for connection with each conductive wire of the cables and a contact 122 for contact with the second terminal array. The feature of the present invention resides in that the wire terminals 120 are arranged in a line, and the contacts 122 of the first terminal array are arranged in two rows in a staggered configuration, and a pitch of the contacts 122 of each row is larger than a pitch of the wire terminals 120.
    Type: Application
    Filed: February 17, 2005
    Publication date: December 7, 2006
    Inventors: Mitsuru IIDA, Hirohisa Tanaka, Kenji Jounen, Kousuke Yoshioka
  • Publication number: 20060259662
    Abstract: A data transfer apparatus according to the present invention has; a DMAC and another DMAC which transfer data by direct memory access among a plurality of buses; a command queue which holds, as a queue, commands for instructing the data transfer; a bus information obtainment unit which obtains the commands from the command queue; a grouping unit which groups the held commands, based on a source and a destination designated in each of the obtained commands; a schedule unit which decides an order of issuing the commands sequentially from a group having more command, as a priority; and a selector which selects a command to be issued according to the decided order.
    Type: Application
    Filed: May 9, 2006
    Publication date: November 16, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuya Furukawa, Nobuo Higaki, Hideyo Tsuruta, Kazushi Kurata, Shigeki Fujii, Kousuke Yoshioka, Hiroyuki Morishita
  • Patent number: 6105127
    Abstract: A multithreaded processor for executing multiple instruction streams is provided. This multithreaded processor includes: a plurality of functional units for executing instructions; a plurality of instruction decode units, corresponding to the multiple instruction streams on a one-to-one basis, for respectively decoding an instruction, and producing an instruction issue request for designating to which functional unit the decoded instruction should be issued and requesting for the issuance of the decoded instruction to the designated functional unit; a holding unit for holding the priority level of each instruction stream; and a control unit for deciding which decoded instruction should be issued to a functional unit designated by two or more instruction issue requests at the same time, in accordance with the priority levels held by the holding unit.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: August 15, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kozo Kimura, Tokuzo Kiyohara, Kousuke Yoshioka