Patents by Inventor Kouta Tateno

Kouta Tateno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6846685
    Abstract: A vertical-cavity surface-emitting semiconductor laser has a substrate, a lower DBR structure portion having a plurality of layers provided on the substrate, a semiconductor buried structure portion provided over the lower DBR structure portion having at least one layer with buried therein an active layer, and an upper DBR structure portion having a plurality of layers provided over the semiconductor buried structure portion including the active layer. The active layer, at least one layer arranged over the active layer and at least one layer arranged beneath the active layer constitute an optical resonator region and each of the layers constituting the optical resonator region has an effective refractive index higher than respective effective refractive indices of other layers in the upper and lower DBR structure portions and a refractive index of the at least one layer constituting the semiconductor buried structure portion.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: January 25, 2005
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroyuki Uenohara, Kouta Tateno, Toshiaki Kagawa, Osamu Tadanaga, Chikara Amano, Takashi Kurokawa
  • Publication number: 20030156613
    Abstract: A vertical-cavity surface-emitting semiconductor laser has a substrate, a lower DBR structure portion having a plurality of layers provided on the substrate, a semiconductor buried structure portion provided over the lower DBR structure portion having at least one layer with buried therein an active layer, and an upper DBR structure portion having a plurality of layers provided over the semiconductor buried structure portion comprising the active layer. The active layer, at least one layer arranged over the active layer and at least one layer arranged beneath the active layer constitute an optical resonator region and each of the layers constituting the optical resonator region has an effective refractive index higher than respective effective refractive indices of other layers in the upper and lower DBR structure portions and a refractive index of the at least one layer constituting the semiconductor buried structure portion.
    Type: Application
    Filed: February 25, 2003
    Publication date: August 21, 2003
    Inventors: Hiroyuki Uenohara, Kouta Tateno, Toshiaki Kagawa, Osamu Tadanaga, Chikara Amano, Takashi Kurokawa
  • Patent number: 6549553
    Abstract: A vertical-cavity surface-emitting semiconductor laser has a substrate, a lower DBR structure portion having a plurality of layers provided on the substrate, a semiconductor buried structure portion provided over the lower DBR structure portion having at least one layer with buried therein an active layer, and an upper DBR structure portion having a plurality of layers provided over the semiconductor buried structure portion comprising the active layer. The active layer, at least one layer arranged over the active layer and at least one layer arranged beneath the active layer constitute an optical resonator region and each of the layers constituting the optical resonator region has an effective refractive index higher than respective effective refractive indices of other layers in the upper and lower DBR structure portions and a refractive index of the at least one layer constituting the semiconductor buried structure portion.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: April 15, 2003
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroyuki Uenohara, Kouta Tateno, Toshiaki Kagawa, Osamu Tadanaga, Chikara Amano, Takashi Kurokawa
  • Patent number: 6127200
    Abstract: A vertical-cavity surface-emitting semiconductor laser has first and second semiconductor multi-layered films, an active layer, and third and fourth semiconductor multi-layered films which are piled up on a GaAs substrate in that order. Furthermore, the first film is formed by piling up Al.sub.x-1 Ga.sub.1-x1 As layers (0.ltoreq.x1.ltoreq.1) and Al.sub.x2 Ga.sub.1-x2 As layers (0.ltoreq.x2.ltoreq.1) one after the other by turns. The second film is formed by piling up In.sub.x3 Ga.sub.1-x3 As.sub.y3 P.sub.1-y3 layers (0.ltoreq.x3, y3.ltoreq.1) and In.sub.x4 Ga.sub.1-x4 As.sub.y4 P.sub.1-y4 layers (0.ltoreq.x4, y4.ltoreq.1) one after the other by turns. The active layer is provided as an In.sub.x5 Ga.sub.1-x5 As.sub.y5 P.sub.1-y5 layer (0.ltoreq.x5, y5.ltoreq.1). The third film is formed by piling up In.sub.x6 Ga.sub.1-x6 As.sub.y6 P.sub.1-y6 layers (0.ltoreq.x6, y6.ltoreq.1) and In.sub.x7 Ga.sub.1-x7 As.sub.y7 P.sub.1-y7 layers (0.ltoreq.x7, y7.ltoreq.1) one after the other by turns.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: October 3, 2000
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Yoshitaka Ohiso, Yoshio Itoh, Chikara Amano, Yoshitaka Kohama, Kouta Tateno, Hirokazu Takenouchi, Takashi Kurokawa
  • Patent number: 5864575
    Abstract: A vertical-cavity surface-emitting semiconductor laser has first and second semiconductor multi-layered films, an active layer, and third and fourth semiconductor multi-layered films which are piled up on a GaAs substrate in that order. Furthermore, the first film is formed by piling up Al.sub.x1 Ga.sub.1-x1 As layers (0.ltoreq.x1.ltoreq.1) and Al.sub.x2 Ga.sub.1-x2 As layers (0.ltoreq.x2.ltoreq.1) one after the other by turns. The second film is formed by piling up In.sub.x3 Ga.sub.1-x3 As.sub.y3 P.sub.1-y3 layers (0.ltoreq.x3, y3.ltoreq.1) and In.sub.x4 Ga.sub.1-x4 As.sub.y4 P.sub.1-y4 layers (0.ltoreq.x4, y4.ltoreq.1) one after the other by turns. The active layer is provided as an In.sub.x5 Ga.sub.1-x5 As.sub.y5 P.sub.1-y5 layer (0.ltoreq.x5, y5.ltoreq.1). The third film is formed by piling up In.sub.x6 Ga.sub.1-x6 AS.sub.y6 P.sub.1-y6 layers (0.ltoreq.x6, y6.ltoreq.1) and In.sub.x7 Ga.sub.1-x7 As.sub.y7 P.sub.1-y7 layers (0.ltoreq.x7, y7.ltoreq.1) one after the other by turns.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: January 26, 1999
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yoshitaka Ohiso, Yoshio Itoh, Chikara Amano, Yoshitaka Kohama, Kouta Tateno, Hirokazu Takenouchi, Takashi Kurokawa