Abstract: A method of producing a semiconductor device according to the present invention includes: a step of implanting an impurity into a semiconductor layer 2 by using a first implantation mask layer 30, thereby forming a body region 6; a step of implanting an impurity by using the first implantation mask layer 30 and a second implantation mask layer 31, thereby forming a contact region 7 within the body region 6; a step of forming a third implantation mask layer 32, and thereafter selectively removing the second implantation mask layer 31; a step of forming a side wall 34 on a side face of the first implantation mask layer 30; and a step of implanting an impurity to form a source region 8 within the body region 6.

Abstract: The present invention is directed to an MIS type semiconductor device, including a channel layer between a semiconductor body region and a gate insulating film, the channel layer having an opposite semiconductor polarity to that of the semiconductor body region. Since Vfb of the semiconductor device is equivalent to or less than a gate rated voltage Vgcc? of the semiconductor device with respect to an OFF-polarity, density of carrier charge that is induced near the surface of the semiconductor body region is kept at a predetermined amount or less with a guaranteed range of operation of the semiconductor device.

Abstract: A method of producing a semiconductor device according to the present invention includes: a step of implanting an impurity into a semiconductor layer 2 by using a first implantation mask layer 30, thereby forming a body region 6; a step of implanting an impurity by using the first implantation mask layer 30 and a second implantation mask layer 31, thereby forming a contact region 7 within the body region 6; a step of forming a third implantation mask layer 32, and thereafter selectively removing the second implantation mask layer 31; a step of forming a side wall 34 on a side face of the first implantation mask layer 30; and a step of implanting an impurity to form a source region 8 within the body region 6.

Abstract: A vehicle control system for an automatic transmission includes a range selector for outputting a range instruction signal representing the selected shift range and a range shifter for manually outputting a shift instruction signal, and a by-wire control part for controlling the change-over of the shift range according to the range instruction signal input from the range selector. The by-wire control part has a range control circuit, which uses the shift instruction signal input from the range shifter if the range instruction signal is abnormal while monitoring the range instruction signal input from the range selector.

Abstract: A waveguide type variable optical attenuator is provided with a substrate for forming a waveguide for optical signal propagation; a waveguide element comprising 2 arm waveguides arranged on the surface of the substrate for constituting a portion of the waveguide and cladding for covering the arm waveguides and the surface of the substrate; and a heater arranged on the surface of the waveguide element for heating the arm waveguides. The 2 arm waveguides are connected thermally.

Abstract: A waveguide type variable optical attenuator is provided with a substrate for forming a waveguide for optical signal propagation; a waveguide element comprising 2 arm waveguides arranged on the surface of the substrate for constituting a portion of the waveguide and cladding for covering the arm waveguides and the surface of the substrate; and a heater arranged on the surface of the waveguide element for heating the arm waveguides. The 2 arm waveguides are connected thermally.

Abstract: The present invention relates to (1) a cleaning gas for cleaning semiconductor production equipment, obtained by mixing SF6 and one or both of F2 with and NF3 with an inert gas at a specific ratio; (2) a cleaning gas for cleaning semiconductor production equipment, obtained by mixing SF6 and one or both of F2 and NF3 with an inert gas and an oxygen-containing gas at a specific ratio; (3) a method for cleaning semiconductor production equipment using the gas; and (4) a method for producing a semiconductor device including a cleaning step using the cleaning gas. By using the cleaning gas for semiconductor production equipment of the present invention which is high in the etching rate, efficient cleaning and production of semiconductor production equipment with excellent cost performance can be achieved.

Abstract: A power FET for which it is difficult to generate oscillations dependent on the interval between adjacent pads. The power FET has a plurality of pads for first terminals, which are disposed on one side of a chip at unequal intervals, and a plurality of pads for second terminals, which are placed on the other side of the chip. Alternatively, or in addition, the plurality of pads for the second terminals may also be disposed at unequal intervals.

Abstract: It is an object of the present invention to provide a semiconductor device that is able to have the same Vp in all FETs formed on one chip.A semiconductor device of the present invention comprises a semiconductor substrate having a first region and a second region on a main surface; a first field effect transistor formed on the first region of the main surface, the first field effect transistor having first gates arranged in a plurality of rows and having a first total gate width, the first gates respectively establishing a first gate length and a first gate width; and a second field effect transistor formed on the second region of the main surface, the second field effect transistor having second gates arranged a plurality of rows and having a second total gate width smaller than the first total gate width, the second gates respectively establishing a second gate length substantially the same as the first gate length and a second gate width substantially the same as the first gate width.

Abstract: In a frequency-dividing circuit for producing an output having a frequency half that of its input, a pair of terminals of a latch circuit are connected to input terminals of a pair of amplify/delay means, and are also connected to receive through a pair of transistors, the outputs of the amplify/delay means. A single-phase input signal is input to the control electrodes of the transistors to turn on and off the transistors. When the transistors are turned from off to on, the output states of the amplify/delay means are transferred through the transistors to invert the latch circuit, and the states of complementary terminals of the latch circuits are in turn transferred through the amplify/delay means to invert the output states of the outputs of the amplify/delay means. When the transistors are turned from on to off, no change occurs in the states of the circuit. In this way, the states of the circuit are inverted each time the transistors are turned from off to on.