Patents by Inventor Kouzou Ogino

Kouzou Ogino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8553198
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: October 8, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Teruyoshi Yao, Satoru Asai, Morimi Osawa, Hiromi Hoshino, Kouzou Ogino, Kazumasa Morishita
  • Publication number: 20120236279
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Application
    Filed: June 4, 2012
    Publication date: September 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LTD
    Inventors: Teruyoshi YAO, Satoru Asai, Morimi Osawa, Hiromi Hoshino, Kouzou Ogino, Kazumasa Morishita
  • Patent number: 8227153
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: July 24, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Teruyoshi Yao, Satoru Asai, Morimi Osawa, Hiromi Hoshino, Kouzou Ogino, Kazumasa Morishita
  • Publication number: 20100209834
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Application
    Filed: April 26, 2010
    Publication date: August 19, 2010
    Applicant: FUJITSU SEMICONDUCTOR LTD.
    Inventors: Teruyoshi YAO, Satoru ASAI, Morimi OSAWA, Hiromi HOSHINO, Kouzou OGINO, Kazumasa MORISHITA
  • Patent number: 7732107
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: June 8, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Teruyoshi Yao, Satoru Asai, Morimi Osawa, Hiromi Hoshino, Kouzou Ogino, Kazumasa Morishita
  • Publication number: 20060018529
    Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every -single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.
    Type: Application
    Filed: November 24, 2004
    Publication date: January 26, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Teruyoshi Yao, Satoru Asai, Morimi Osawa, Hiromi Hoshino, Kouzou Ogino, Kazumasa Morishita