Patents by Inventor Kouzou Watanabe

Kouzou Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7524729
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: April 28, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Publication number: 20090029524
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Application
    Filed: October 2, 2008
    Publication date: January 29, 2009
    Inventors: Kenji KANAMITSU, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Publication number: 20050260820
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Application
    Filed: July 27, 2005
    Publication date: November 24, 2005
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Patent number: 6967141
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: November 22, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Publication number: 20050014340
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Application
    Filed: August 17, 2004
    Publication date: January 20, 2005
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Patent number: 6722589
    Abstract: Problems are posed by slip prevention particle injection devices by wheels of railway rolling stock. Namely, if the injected quantity of slippage-preventing particles is adjusted so as not to be excessive and to be a suitable quantity, it is not possible to obtain a predetermined injection pressure and it is not possible to inject the particles at the target location. The injector device of the present invention is constituted by providing an air through-flow duct 5 inside a particle retainer tank 1, and connecting an air supply duct 17 to this air through-flow duct 5. In the above mentioned tank 1, in addition to an air inflow duct 6 being provided in the vicinity of the inlet side of the air through-flow duct 5, an air discharge duct 18 is provided in the vicinity of the outlet side of the air through-flow duct 5. This air inflow duct 6 and air discharge duct 18 are connected to the air through-flow duct 5 and one end of these ducts 6 and 18 is open into the tank 1.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: April 20, 2004
    Assignees: Railway Technical Research Institute, Nicchu Co., Ltd.
    Inventors: Kaoru Ohno, Kosuke Matsuoka, Kouzou Watanabe
  • Publication number: 20040069876
    Abstract: Problems are posed by slip prevention particle injection devices by wheels of railway rolling stock. Namely, if the injected quantity of slippage-preventing particles is adjusted so as not to be excessive and to be a suitable quantity, it is not possible to obtain a predetermined injection pressure and it is not possible to inject the particles at the target location.
    Type: Application
    Filed: October 30, 2001
    Publication date: April 15, 2004
    Inventors: Kaoru Ohno, Kosuke Matsuoka, Kouzou Watanabe
  • Patent number: 6544839
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: April 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Publication number: 20030038337
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Application
    Filed: October 15, 2002
    Publication date: February 27, 2003
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Patent number: 5351182
    Abstract: An inverter apparatus includes a flip-flop circuit and a voltage clamp circuit disposed in the upper arm, and set and reset signal generators each having a series connection of two switching devices. By using an input signal and using an output signal of the flip-flop circuit, the above described two switching devices are activated in a complementary manner. Owing to this configuration, no current flows except a minute time for supplying a trigger signal to the flip-flop circuit, resulting in low current consumption. If the output logic of the flip-flop circuit has been inverted by noise, two switching devices are simultaneously in the on-state and a re-trigger current is let flow to restore the above described output logic to the normal state, resulting in the complementary state again. As a result, signal transmission between the upper and lower arms is performed at higher speed and with a lower loss. In addition, the inverter apparatus is protected from false operation due to noise.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: September 27, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Miyazaki, Tsunehiro Endo, Kouzou Watanabe, Yuhachi Takakura, Koichi Suda
  • Patent number: 5280228
    Abstract: A three-phase bridge inverter for controlling a motor with a variable speed includes a drive circuit therefor and an overcurrent protection circuit on one integrated chip. The inverter IC can be operated by directly inputting a direct current obtained by rectifying commercial 100 V. Thus, the inverter chip reduces the size and the weight of a system, improves the usability, lowers the cost thereof and permits mass production fabrication. Also, the life of the IC is increased by detecting current flowing through the inverter and the temperature of the chip and stopping the operation, when an abnormality is found.
    Type: Grant
    Filed: March 20, 1991
    Date of Patent: January 18, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Kanouda, Hideki Miyazaki, Kouzou Watanabe, Kenichi Onda
  • Patent number: 5216587
    Abstract: An inverter includes first, second, and third dc voltage sources, first and second switching elements which are connected in series to the first dc voltage source, a signal generator section for producing first and second control signals on the basis of the output voltage from the third dc voltage source, first and second signal level converter sections for converting voltage levels of the first and second control signals based on the output voltage from the second dc voltage source and thereby respectively generating first and second output signals, and first and second driver sections responsive to the first and second output signals for supplying the first and second switching element with first and second driving signals on the basis of the output voltage from the second dc voltage source and thereby respectively turning the first and second switching elements on or off.
    Type: Grant
    Filed: April 2, 1992
    Date of Patent: June 1, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Miyazaki, Kouzou Watanabe, Kenichi Onda, Tomoyuki Tanaka, Masayuki Wada
  • Patent number: 4909388
    Abstract: This disclosure depicts a novel compressed roll paper, wrapped with a plastic film or films, having a flat shape in cross section, that is advantageous in reducing the cost of transportation and being easily restored to a circular shape in cross section for use. Particularly, the roll, being wrapped with a plastic film or films so as to be air-tight or non-permeable to liquid, can avoid deterioration in quality due to rain, moisture and the like during transportation and storage.
    Type: Grant
    Filed: April 7, 1989
    Date of Patent: March 20, 1990
    Inventor: Kouzou Watanabe
  • Patent number: 4762061
    Abstract: This invention relates to compression of a paper roll for reducing a volume thereof. The paper roll is introduced into a receiver which includes side wall members disposed in parallel with each other and leaning a given space therebetween, a wall member spanning the space between the side wall members for bearing the paper roll during the compression thereof, and a compressing plate member disposed between said side wall member and connected to a pusher rod member. The paper roll is compressed by moving the compressing plate member toward the spanning wall member and is deformed into a flat shape until a diameter of the paper roll is reduced to a thickness within the range between one-half and one-fifth. A degree of the compression is regulated so that the volume reduction can be effectively obtained while it can be easily restituted to its original shape.
    Type: Grant
    Filed: February 11, 1987
    Date of Patent: August 9, 1988
    Inventors: Kouzou Watanabe, Yasuhiko Saito
  • Patent number: 4692643
    Abstract: A semiconductor switching device includes a row of a plurality of switching elements connected in series. The input terminal of the input-nearest switching element and the output terminal of the output-nearest switching element are connected with the input terminal and output terminal of the semiconductor switching device, respectively. A control signal is applied to the control terminal of the output-nearest switching element. The semiconductor switching device comprises a first plurality of capacitive elements each of which is connected between the output terminal of the output-nearer switching element and the control terminal of the input-nearer switching element of the adjacent switching elements among the switching element row; and a second capacitive element connected between the output terminal and input terminal of the input-nearest switching element. At least the switching elements (S.sub.2 -S.sub.n) have insulating gates, respectively.
    Type: Grant
    Filed: October 26, 1984
    Date of Patent: September 8, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Norikazu Tokunaga, Hiroshi Fukui, Kouzou Watanabe, Hisao Amano, Masayoshi Sato
  • Patent number: 4012679
    Abstract: A method and an apparatus for controlling the operation of the synchronous motor are disclosed in which the synchronous motor is started with a starting power supply and operated with a steadying power supply. The starting power supply is adapted to alternately repeat acceleration and deceleration of the synchronous motor in the neighborhood of the frequency thereby to bring the synchronous motor into the point where the synchronous motor is in synchronism with the steadying power supply. The starting power supply comprises a current control circuit and a phase angle control circuit, which circuits control the motor current in such a manner as to prevent the voltage drop due to the synchronous reactance of the motor from exceeding the induced voltage of the motor, while at the same time controlling the power factor angle to be in the range from a lead 90.degree. to the angle corresponding to a maximum output point produced by said motor current.
    Type: Grant
    Filed: January 23, 1975
    Date of Patent: March 15, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Matsuda, Takeo Maeda, Kouzou Watanabe, Kazuo Honda, Hironori Okuda, Kunio Miyashita, Yasuyuki Sugiura