Patents by Inventor Koya Kikuchi

Koya Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080199979
    Abstract: Method of manufacturing a semiconductor device, including: preparing a TAB tape featuring an insulating tape having a device hole and a plurality of holes, a plurality of leads formed on a surface of the tape and extending at one end into the device hole and at the other end into the holes, slits provided inside arrangements of columns of holes, and a warp prevention reinforcement insulating film to hold the leads between it and the tape; connecting front ends of the leads to the electrodes of the chip; forming an encapsulant to enclose the chip, the leads and a portion of the tape; forming thick bump electrodes on that surface side of the leads running through the holes to which the semiconductor chip is connected; performing an electric characteristic test, using the bump electrodes as measuring terminals; and cutting the TAB tape to a predetermined shape.
    Type: Application
    Filed: April 17, 2008
    Publication date: August 21, 2008
    Inventors: Koya KIKUCHI, Noriou Shimada, Keiyo Kusanagi, Akihiko Hatasawa, Yutaka Kagaya
  • Patent number: 7372130
    Abstract: A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: May 13, 2008
    Assignee: Elpida Memory, Inc.
    Inventors: Koya Kikuchi, Noriou Shimada, Keiyo Kusanagi, Akihiko Hatasawa, Yutaka Kagaya
  • Patent number: 7321165
    Abstract: In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of the leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates. At least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals. A technique for sorting good products is performed in a state in which the chips are mounted on the substrates.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: January 22, 2008
    Assignee: Elpida Memory, Inc.
    Inventors: Yutaka Kagaya, Keiyo Kusanagi, Koya Kikuchi, Akihiko Hatasawa
  • Publication number: 20050258519
    Abstract: A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.
    Type: Application
    Filed: August 20, 2004
    Publication date: November 24, 2005
    Inventors: Koya Kikuchi, Noriou Shimada, Keiyo Kusanagi, Akihiko Hatasawa, Yutaka Kagaya
  • Publication number: 20050077608
    Abstract: Using in common a substrate for performing a stack and assembly of semiconductor chips, and coping with increase of the number of signals. In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates, and at least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals.
    Type: Application
    Filed: July 8, 2004
    Publication date: April 14, 2005
    Inventors: Yutaka Kagaya, Keiyo Kusanagi, Koya Kikuchi, Akihiko Hatasawa