Patents by Inventor Koyu Takahashi
Koyu Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11224120Abstract: Provided is a print circuit board including: a ground conductor layer; a pair of strip conductors extending along a first orientation; a first resonator conductor three-dimensionally intersecting with the pair of strip conductors along a second orientation; a pair of first via holes connecting the first resonator conductor and the ground conductor layer; and a dielectric layer including the first resonator conductor therein, and being disposed between the ground conductor layer and the pair of the strip conductors. A distance H1 between the pair of strip conductors and the ground conductor layer is twice or more a distance H2 between the pair of strip conductors and the first resonator conductor, and a line length L of the first resonator conductor is 0.4 wavelength or more and 0.6 wavelength or less at a frequency corresponding to the bit rate.Type: GrantFiled: February 20, 2020Date of Patent: January 11, 2022Assignee: Lumentum Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Yoshikuni Uchida
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Publication number: 20200196438Abstract: Provided is a print circuit board including: a ground conductor layer; a pair of strip conductors extending along a first orientation; a first resonator conductor three-dimensionally intersecting with the pair of strip conductors along a second orientation; a pair of first via holes connecting the first resonator conductor and the ground conductor layer; and a dielectric layer including the first resonator conductor therein, and being disposed between the ground conductor layer and the pair of the strip conductors. A distance Hi between the pair of strip conductors and the ground conductor layer is twice or more a distance H2 between the pair of strip conductors and the first resonator conductor, and a line length L of the first resonator conductor is 0.4 wavelength or more and 0.6 wavelength or less at a frequency corresponding to the bit rate.Type: ApplicationFiled: February 20, 2020Publication date: June 18, 2020Inventors: Osamu KAGAYA, Koyu TAKAHASHI, Yoshikuni UCHIDA
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Patent number: 10609812Abstract: Provided is a print circuit board including: a ground conductor layer; a pair of strip conductors extending along a first orientation; a first resonator conductor three-dimensionally intersecting with the pair of strip conductors along a second orientation; a pair of first via holes connecting the first resonator conductor and the ground conductor layer; and a dielectric layer including the first resonator conductor therein, and being disposed between the ground conductor layer and the pair of the strip conductors. A distance Hi between the pair of strip conductors and the ground conductor layer is twice or more a distance H2 between the pair of strip conductors and the first resonator conductor, and a line length L of the first resonator conductor is 0.4 wavelength or more and 0.6 wavelength or less at a frequency corresponding to the bit rate.Type: GrantFiled: December 8, 2017Date of Patent: March 31, 2020Assignee: Lumentum Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Yoshikuni Uchida
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Patent number: 10128554Abstract: A printed circuit board includes a first signal line inside a first dielectric layer; a first ground conductor layer and a second ground conductor layer; a second signal line disposed on the first ground conductor layer; a signal via for connecting the first signal line and the second signal line; and ground vias formed surrounding the signal via. The ground vias include first ground vias formed at respective first points, second ground vias formed at respective second points. The first points are placed on the line of a first polygon, and the second points are placed on the line of a second polygon, and the distances between adjacent first points and those between adjacent second points are all equal to or shorter than a first distance, and at least one second point is placed within the first distance from each of the adjacent first points.Type: GrantFiled: March 16, 2017Date of Patent: November 13, 2018Assignee: Oclaro Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi
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Patent number: 10116116Abstract: Provided are a printed circuit board configured to achieve reduction in impedance of a differential transmission line extending in a stacking direction, and an optical module. The printed circuit board includes a stacking-direction differential transmission line extending in the stacking direction, including: a differential signal via pair including a first signal via and a second signal via; and a plurality of conductor plate pairs each including a first conductor plate expanding outward from the first signal via, and a second conductor plate expanding outward from the second signal via. With respect to a perpendicular bisector of a center-of-gravity line segment connecting centers of gravity of the first and second signal vias, in each of the plurality of conductor plate pairs, centers of gravity of contours of the first and second conductor plates are located on inner sides of the centers of gravity.Type: GrantFiled: May 3, 2017Date of Patent: October 30, 2018Assignee: Oclaro Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Hiroyoshi Ishii
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Publication number: 20180177042Abstract: Provided is a print circuit board including: a ground conductor layer; a pair of strip conductors extending along a first orientation; a first resonator conductor three-dimensionally intersecting with the pair of strip conductors along a second orientation; a pair of first via holes connecting the first resonator conductor and the ground conductor layer; and a dielectric layer including the first resonator conductor therein, and being disposed between the ground conductor layer and the pair of the strip conductors. A distance H1 between the pair of strip conductors and the ground conductor layer is twice or more a distance H2 between the pair of strip conductors and the first resonator conductor, and a line length L of the first resonator conductor is 0.4 wavelength or more and 0.6 wavelength or less at a frequency corresponding to the bit rate.Type: ApplicationFiled: December 8, 2017Publication date: June 21, 2018Inventors: Osamu KAGAYA, Koyu TAKAHASHI, Yoshikuni UCHIDA
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Publication number: 20170331250Abstract: Provided are a printed circuit board configured to achieve reduction in impedance of a differential transmission line extending in a stacking direction, and an optical module. The printed circuit board includes a stacking-direction differential transmission line extending in the stacking direction, including: a differential signal via pair including a first signal via and a second signal via; and a plurality of conductor plate pairs each including a first conductor plate expanding outward from the first signal via, and a second conductor plate expanding outward from the second signal via. With respect to a perpendicular bisector of a center-of-gravity line segment connecting centers of gravity of the first and second signal vias, in each of the plurality of conductor plate pairs, centers of gravity of contours of the first and second conductor plates are located on inner sides of the centers of gravity.Type: ApplicationFiled: May 3, 2017Publication date: November 16, 2017Inventors: Osamu KAGAYA, Koyu TAKAHASHI, Hiroyoshi ISHII
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Patent number: 9781824Abstract: A differential transmission circuit includes: a dielectric layer for embedding a plurality of first strip conductor pairs arranged side by side in the same layer above a ground conductor layer, each of the plurality of first strip conductor pairs including a first right strip conductor and a first left strip conductor, the dielectric layer being formed from an upper side of the ground conductor layer up to a region above the plurality of first strip conductor pairs, the dielectric layer having a flat upper surface. A region between adjacent two of the plurality of first strip conductor pairs is embedded in the dielectric layer without arranging a conductor in the region.Type: GrantFiled: March 31, 2015Date of Patent: October 3, 2017Assignee: OCLARO JAPAN, INC.Inventors: Osamu Kagaya, Koyu Takahashi
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Publication number: 20170271735Abstract: A printed circuit board includes a first signal line inside a first dielectric layer; a first ground conductor layer and a second ground conductor layer; a second signal line disposed on the first ground conductor layer; a signal via for connecting the first signal line and the second signal line; and ground vias formed surrounding the signal via. The ground vias include first ground vias formed at respective first points, second ground vias formed at respective second points. The first points are placed on the line of a first polygon, and the second points are placed on the line of a second polygon, and the distances between adjacent first points and those between adjacent second points are all equal to or shorter than a first distance, and at least one second point is placed within the first distance from each of the adjacent first points.Type: ApplicationFiled: March 16, 2017Publication date: September 21, 2017Inventors: Osamu KAGAYA, Koyu TAKAHASHI
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Publication number: 20150282300Abstract: A differential transmission circuit includes: a dielectric layer for embedding a plurality of first strip conductor pairs arranged side by side in the same layer above a ground conductor layer, each of the plurality of first strip conductor pairs including a first right strip conductor and a first left strip conductor, the dielectric layer being formed from an upper side of the ground conductor layer up to a region above the plurality of first strip conductor pairs, the dielectric layer having a flat upper surface. A region between adjacent two of the plurality of first strip conductor pairs is embedded in the dielectric layer without arranging a conductor in the region.Type: ApplicationFiled: March 31, 2015Publication date: October 1, 2015Inventors: Osamu KAGAYA, Koyu TAKAHASHI
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Patent number: 8660434Abstract: A printed circuit board includes a substrate, a signal output circuit formed on the substrate for outputting a clock signal, a shield for covering the signal output circuit, a power supply wiring for connecting the signal output circuit and a power source, and a trap filter provided to the power supply wiring and provided inside the shield, for attenuating a frequency component corresponding to a frequency of clock signal. The trap filter includes a resonance circuit having one portion of the power supply wiring, an inner-layer wiring of the substrate located below the one portion of the power supply wiring, an inner-layer ground wiring of the substrate located below the inner-layer wiring, and a via hole for connecting the one portion of the power supply wiring and the inner-layer wiring.Type: GrantFiled: February 20, 2013Date of Patent: February 25, 2014Assignee: Oclaro Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Taichi Kogure
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Publication number: 20130163996Abstract: A printed circuit board includes a substrate, a signal output circuit formed on the substrate for outputting a clock signal, a shield for covering the signal output circuit, a power supply wiring for connecting the signal output circuit and a power source, and a trap filter provided to the power supply wiring and provided inside the shield, for attenuating a frequency component corresponding to a frequency of clock signal. The trap filter includes a resonance circuit having one portion of the power supply wiring, an inner-layer wiring of the substrate located below the one portion of the power supply wiring, an inner-layer ground wiring of the substrate located below the inner-layer wiring, and a via hole for connecting the one portion of the power supply wiring and the inner-layer wiring.Type: ApplicationFiled: February 20, 2013Publication date: June 27, 2013Applicant: Oclaro Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Taichi Kogure
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Patent number: 8385748Abstract: To reduce emission of an unintentional electromagnetic wave even if a frequency of a clock signal being output is high, a printed circuit board (10) includes: a substrate (101); signal output circuits (102 and 103) formed on the substrate (101), for outputting a clock signal; power supply wirings (109 and 110) for connecting the signal output circuits (102 and 103) and a power source; and trap filters (107 and 108) provided to the power supply wirings (109 and 110), for attenuating a frequency component corresponding to a frequency of the clock signal.Type: GrantFiled: November 16, 2009Date of Patent: February 26, 2013Assignee: Oclaro Japan, Inc.Inventors: Osamu Kagaya, Koyu Takahashi, Taichi Kogure
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Publication number: 20100124423Abstract: To reduce emission of an unintentional electromagnetic wave even if a frequency of a clock signal being output is high, a printed circuit board (10) includes: a substrate (101); signal output circuits (102 and 103) formed on the substrate (101), for outputting a clock signal; power supply wirings (109 and 110) for connecting the signal output circuits (102 and 103) and a power source; and trap filters (107 and 108) provided to the power supply wirings (109 and 110), for attenuating a frequency component corresponding to a frequency of the clock signal.Type: ApplicationFiled: November 16, 2009Publication date: May 20, 2010Inventors: Osamu KAGAYA, Koyu Takahashi, Taichi Kogure
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Patent number: 5867314Abstract: A hollow magnetic member includes a plurality of separate magnetic pieces. A parting surface between such pieces is defined by a plane parallel to or defining an angle of not more than forty-five (45) degrees with a center axis of the magnetic member. A holder for supporting a polarizer has such a cross section defined by a part of a cylinder cut away along a plane parallel to or defining an angle of not more than forty-five (45) degrees with the center axis thereof. A notched portion is formed in a cutting surface for containing the polarizer. A jig for assembly includes a base for holding the holder and a plate for positioning optical elements such as the polarizer. The holder is disposed in a recess in the base with the notched portion directed upward. A bonding material is applied to the notched portion prior to installation of the polarizer. The plate is placed on the base by inserting pins through holes, and then a screw is engaged with a tapped hole.Type: GrantFiled: August 19, 1996Date of Patent: February 2, 1999Assignee: Fuji Electrochemical Co., Ltd.Inventors: Yuko Ota, Koyu Takahashi, Shigetaka Goto, Mototsugu Goto, Terushi Otani