Patents by Inventor Kozo Yasuda
Kozo Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110201846Abstract: It is an object of the present invention to provide a method for producing an alkylated aromatic compound and a method for producing cumene that can greatly reduce the amount of solid acid substance, and a method for producing phenol including a step of producing cumene by the method for producing cumene.Type: ApplicationFiled: October 22, 2009Publication date: August 18, 2011Applicant: MITSUI CHEMICALS, INC.Inventors: Kenji Fujiwara, Tsuneyuki Ohkubo, Terunori Fujita, Shinobu Aoki, Masayasu Ishibashi, Masao Imai, Kozo Yasuda
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Publication number: 20110015450Abstract: Processes of the invention provide alcohols such as isopropyl alcohol with high purity and little by-product impurities by reacting a ketone such as acetone and hydrogen. The process for producing alcohols includes catalytically hydrogenating a ketone in the presence of a catalyst into an alcohol, and the catalyst is an acid-treated Raney catalyst obtained by contact-treating a Raney catalyst with an acid.Type: ApplicationFiled: August 29, 2008Publication date: January 20, 2011Applicant: Mitsui Chemicals, Inc.Inventors: Kunihiko Morizane, Tatsuo Shirahata, Kozo Yasuda
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Publication number: 20110006192Abstract: Each optical sensor element includes an upper electrode, a lower electrode, and a light dependent variable resistance element formed of amorphous silicon. Each optical sensor pixel includes: a capacitive element between the lower electrode and a reference voltage line; a first transistor inputting a first power source voltage to a second electrode, connecting a first electrode to the lower electrode, and inputting a second clock to a control electrode; a second transistor inputting a second power source voltage to a second electrode, and connecting a control electrode to the lower electrode; and a third transistor connecting a second electrode to a first electrode of the second transistor, connecting a first electrode to the output line, and inputting a first clock to a control electrode.Type: ApplicationFiled: July 8, 2010Publication date: January 13, 2011Inventors: Toshio MIYAZAWA, Hideki Nakagawa, Kozo Yasuda
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Patent number: 7839373Abstract: A display device which arranges a memory part for every display pixel is configured to prevent a charge from remaining in liquid crystal when a power source is turned off. Each display pixel includes a memory part for storing video data, a pixel electrode, and a switch part for selectively applying a first video voltage or a second video voltage different from the first video voltage to the pixel electrode corresponding to the video data stored in the memory part. The display device further includes a reset circuit for allowing the first video voltage and the second video voltage to have the same voltage when a power source of the display device is turned off.Type: GrantFiled: June 3, 2008Date of Patent: November 23, 2010Assignee: Hitachi Displays, Ltd.Inventors: Kozo Yasuda, Katsumi Matsumoto
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Publication number: 20100265226Abstract: A control electrode of j (1?j?N?1)th transistor is connected to gate lines of (j+1)th group. A scanning line drive circuit outputs a first selection scanning voltage selecting scanning lines within each of groups for every 1 horizontal scanning period to gate lines of k1 gate line of a first group, outputs a second selection scanning voltage for selecting scanning lines in one group out of groups at a second stage where a group including k1 scanning lines is set as 1 unit for every k1 horizontal scanning period to k2 gate lines of a second group, and outputs (m+1)th selection scanning voltage for selecting the scanning lines in one group out of the groups at (m+1)th stage where a group including km scanning lines is set as 1 unit for every (km× . . . ×k1) horizontal scanning period to gate lines of (m+1)th group having k(m+1) (2?m?N?1) gate lines.Type: ApplicationFiled: April 13, 2010Publication date: October 21, 2010Inventor: Kozo YASUDA
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Publication number: 20100097364Abstract: An object of the present invention is to increase the speed of the level shifting operation in a display device having a level shift circuit formed of polysilicon thin film transistors. The present invention provides a display device having a level shift circuit wherein the above described level shift circuit has: a thin film transistor having a semiconductor layer formed of a polysilicon layer; a load resistance element connected between a second electrode of the above described thin film transistor and a reference power supply; and a waveform rectifying circuit connected to the second electrode of the above described thin film transistor, and a diode element of which the anode region is connected to the first electrode of the above described thin film transistor and of which the cathode region is connected to the second electrode of the above described thin film transistor.Type: ApplicationFiled: October 14, 2009Publication date: April 22, 2010Inventors: Naohisa Ando, Katsumi Matsumoto, Kozo Yasuda
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Publication number: 20100079435Abstract: The number of wirings between a scanning circuit and a plurality of scanning lines is decreased with a more simple circuit configuration than a conventional one. The scanning lines are grouped into kN× . . . ×k2 groups. First to Nth groups of gate wirings are included, each of the first to Nth groups being composed of kn (1?n?N) gate wirings. A scanning line drive circuit outputs a first selection scanning voltage which selects the scanning lines in each of the groups every horizontal scanning period to the first group of k1 gate wirings, outputs a second selection scanning voltage which selects the scanning lines in one of groups in a second stage where k2 groups constitute one unit every k1 horizontal scanning periods to the second group of k2 gate wirings, and outputs an mth selection scanning voltage which selects the scanning lines in one of groups in an mth stage where k (m?1) groups in a (m?1)th stage constitute one unit every (k (m?1)× . . .Type: ApplicationFiled: September 25, 2009Publication date: April 1, 2010Inventor: Kozo YASUDA
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Publication number: 20100073389Abstract: In a display device which arranges a memory part for every display pixel, an erroneous operation of the memory part and the power consumption can be reduced. In a display device provided with a display panel which includes a plurality of display pixels, video lines which apply video data to the display pixels, and scanning lines which apply a scanning voltage to the display pixels, the display pixel includes a memory part which stores the video data, a pixel electrode, and a switching part which selectively applies a first video voltage or a second video voltage which differs from the first video voltage to the pixel electrode in response to the video data stored in the memory part.Type: ApplicationFiled: November 24, 2009Publication date: March 25, 2010Applicant: Hitachi Displays, Ltd.Inventors: Kozo Yasuda, Toshio Miyazawa, Hiroyuki Abe
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Publication number: 20090322731Abstract: A display device includes a memory unit formed in each pixel to store video data and including a first inverter circuit whose input terminal is connected to a first node and whose output terminal is connected to a second node and a second inverter circuit whose input terminal is connected to the second node and whose output terminal is connected to the first node, a first transistor connected between the output terminal of the second inverter circuit and the video line, and a second transistor connected between the first node and the video line, in which at the time of reading the video data, the first transistor is turned ON, and the second transistor is turned OFF, to output the video data stored in the memory unit to the video line.Type: ApplicationFiled: June 24, 2009Publication date: December 31, 2009Inventor: Kozo YASUDA
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Publication number: 20090256792Abstract: An object of the present invention is to increase the reliability in the level shift operation in a display device provided with a level shift circuit. The display device according to the present invention is characterized in that the above described level shift circuit comprises: a first thin film transistor having a semiconductor layer formed of a polysilicon layer; a waveform rectifying circuit connected to a second electrode of the above described first thin film transistor; and a constant current source and a switching element connected between the second electrode of the above described first thin film transistor and a reference power source, wherein a bias voltage is inputted into a control electrode of the above described first thin film transistor and an input signal is inputted into a first electrode of the above described first thin film transistor.Type: ApplicationFiled: April 9, 2009Publication date: October 15, 2009Inventors: Katsumi MATSUMOTO, Kozo Yasuda, Naohisa Ando, Toshio Miyazawa
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Publication number: 20090213057Abstract: Provided is a display device including a level shift circuit, which includes a thin film transistor having a polycrystalline semiconductor layer, and which realizes a reliable operation even when a threshold of the thin film transistor varies. The display device includes: a board; and the level shift circuit which includes the thin film transistor having the polycrystalline semiconductor layer, and is formed on the board, in which the level shift circuit includes: a plurality of source-input level shift circuits including a plurality of unit level shift circuits having drain resistors different in value from one another; and a selection circuit, which selects one of outputs from the plurality of unit level shift circuits as an output from a normally operated unit level shift circuit.Type: ApplicationFiled: February 25, 2009Publication date: August 27, 2009Inventors: Kozo YASUDA, Katsumi Matsumoto
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Publication number: 20090213061Abstract: A display device is provided comprising a plurality of pixels disposed in a matrix form in a display area of a substrate, each of the plurality of pixels having a memory which stores written data, a scan line which is provided common to pixels arranged along a row direction and through which a scan signal is supplied to the pixels, and an image line which is provided common to pixels arranged along a column direction and through which an image signal is supplied to the pixels, wherein the scan signal is supplied to the scan line through a vertical address circuit or a vertical shift register circuit, and data is supplied to the image line through a horizontal scan shift register circuit.Type: ApplicationFiled: February 19, 2009Publication date: August 27, 2009Inventor: Kozo Yasuda
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Publication number: 20090213060Abstract: A display device includes, in each pixel including a pixel electrode and a counter electrode with liquid crystal therebetween, a memory part which stores video data written to the pixel electrode and a switch part which applies a first video voltage to the counter electrode and selects and applies the first video voltage or a second video voltage which is obtained by inverting the first video voltage to the pixel electrode in accordance with the video data stored in the memory part, in which a liquid crystal inversion AC cycle during which the first video voltage and the second video voltage are driven such that a magnitude of the first video voltage and a magnitude of the second video voltage are exchanged in a predetermined cycle is set longer than a rewrite cycle of video data to the pixel electrode.Type: ApplicationFiled: February 25, 2009Publication date: August 27, 2009Inventors: Kozo YASUDA, Katsumi Matsumoto
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Publication number: 20090073149Abstract: The gate electrode is formed above the polycrystalline semiconductor layer through the gate insulating film. The polycrystalline semiconductor layer includes a first region overlapping with the gate electrode in plan view. The first region is sandwiched between the second region and the third region. The second region of the polycrystalline semiconductor layer includes a first impurity diffusion region and two second impurity diffusion regions opposite in conductivity type to the first impurity diffusion region. The first region and the first impurity diffusion region are in contact with each other at a first boundary. The first region and the two second impurity diffusion regions are in contact with each other at second boundaries. The two second impurity diffusion regions sandwiching the first impurity diffusion region are provided along the gate electrode. Thus, a leak current is suppressed.Type: ApplicationFiled: August 7, 2008Publication date: March 19, 2009Inventors: Katsumi Matsumoto, Kozo Yasuda, Yasukazu Kimura, Takuo Kaitoh, Toshihiko Itoga, Hiroshi Kageyama
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Publication number: 20090045406Abstract: A semiconductor device which can realize a diode function is provided with a manufacturing process of a polysilicon thin film transistor and without adding a dedicated process.Type: ApplicationFiled: August 12, 2008Publication date: February 19, 2009Inventors: Katsumi Matsumoto, Kozo Yasuda
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Publication number: 20080303762Abstract: A display device which arranges a memory part for every display pixel is configured to prevent a charge from remaining in liquid crystal when a power source is turned off. Each display pixel includes a memory part for storing video data, a pixel electrode, and a switch part for selectively applying a first video voltage or a second video voltage different from the first video voltage to the pixel electrode corresponding to the video data stored in the memory part. The display device further includes a reset circuit for allowing the first video voltage and the second video voltage to have the same voltage when a power source of the display device is turned off.Type: ApplicationFiled: June 3, 2008Publication date: December 11, 2008Inventors: Kozo Yasuda, Katsumi Matsumoto
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Publication number: 20080204619Abstract: A display device in which gate drive circuits are formed at both sides of an effective screen, and a static charge shield conductive film is formed to cover the gate drive circuits. In the manufacturing step and after producing the display device, the constant voltage is applied to the static charge shield conductive film via the common pad, the earth connection line and the like.Type: ApplicationFiled: February 20, 2008Publication date: August 28, 2008Inventors: Terunori Saitou, Yoshiharu Owaku, Kozo Yasuda, Toshio Miyazawa
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Publication number: 20080186291Abstract: The present invention is to prevent a capture error of display data caused by a delay due to a built-in driving circuit in a display device with a built-in driving circuit.Type: ApplicationFiled: September 25, 2007Publication date: August 7, 2008Inventors: Katsumi Matsumoto, Kozo Yasuda, Hiroshi Kageyama
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Publication number: 20080174538Abstract: A display device includes a display panel having (m×n) pieces of pixels wherein m and n are integers of 2 or more, n pieces of video lines, and m pieces of scanning lines, a video line address circuit, a scanning line address circuit, n pieces of video line vector circuits which are connected to the respective output terminals of the video line address circuit and input the same video data to the pixels at address positions from a starting address to an ending address at one time, and m pieces of scanning line vector circuits which are connected to the respective output terminals of the scanning line address circuits and input the selective scanning voltages to the pixels at the address positions from the starting address to the ending address at one time.Type: ApplicationFiled: January 17, 2008Publication date: July 24, 2008Inventors: Kozo Yasuda, Katsumi Matsumoto, Toshio Miyazawa
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Patent number: 7274625Abstract: An oscillator circuit includes (2n+1) inverters connected in series when n is a natural number, an integrator circuit having an input terminal connected to an output terminal of a (2n+1)-th inverter and an output terminal connected to an input terminal of a first inverter, first and second p-type transistors connected in series between the input terminal of the first inverter and a first reference potential, and first and second n-type transistors connected in series between the input terminal of the first inverter and a second reference potential. An output voltage of a j-th inverter is applied to control electrodes of the first p-type transistor and the first n-type transistor. An output voltage of a k-th inverter is applied to control-electrodes of the second p-type transistor and the second n-type transistor. Symbol j is an odd number, k is an even number, and j<k=2n is satisfied.Type: GrantFiled: February 1, 2007Date of Patent: September 25, 2007Assignee: Hitachi Displays, Ltd.Inventors: Katsumi Matsumoto, Kozo Yasuda, Hiroshi Kageyama, Hideo Sato, Toshio Miyazawa