Patents by Inventor Kraig Allan Bottemiller

Kraig Allan Bottemiller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7941652
    Abstract: A method, apparatus and computer program product are provided for implementing atomic data tracing in a processor system including an auxiliary processor unit (APU) coupled to a central processor unit (CPU). The auxiliary processor unit (APU) processes a trace instruction. When a trace instruction is identified by the APU, the APU signals the CPU with a pipeline stall signal for stalling the CPU and checks for an enabled trace engine as specified by the trace instruction. When the trace engine for the trace instruction is enabled, then the trace data is written into a trace buffer. The APU signals the CPU with an op done signal for allowing the CPU to continue with instruction processing.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: Kraig Allan Bottemiller, Brent William Jacobs, James Albert Pieterick
  • Publication number: 20080201615
    Abstract: A method, apparatus and computer program product are provided for implementing atomic data tracing in a processor system including an auxiliary processor unit (APU) coupled to a central processor unit (CPU). The auxiliary processor unit (APU) processes a trace instruction. When a trace instruction is identified by the APU, the APU signals the CPU with a pipeline stall signal for stalling the CPU and checks for an enabled trace engine as specified by the trace instruction. When the trace engine for the trace instruction is enabled, then the trace data is written into a trace buffer. The APU signals the CPU with an op done signal for allowing the CPU to continue with instruction processing.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 21, 2008
    Applicant: International Business Machines Corporation
    Inventors: Kraig Allan Bottemiller, Brent William Jacobs, James Albert Pieterick
  • Patent number: 7383428
    Abstract: A method, apparatus and computer program product are provided for implementing atomic data tracing in a processor system including an auxiliary processor unit (APU) coupled to a central processor unit (CPU). The auxiliary processor unit (APU) processes a trace instruction. When a trace instruction is identified by the APU, the APU signals the CPU with a pipeline stall signal for stalling the CPU and checks for an enabled trace engine as specified by the trace instruction. When the trace engine for the trace instruction is enabled, then the trace data is written into a trace buffer. The APU signals the CPU with an op done signal for allowing the CPU to continue with instruction processing.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: June 3, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kraig Allan Bottemiller, Brent William Jacobs, James Albert Pieterick
  • Patent number: 7089396
    Abstract: A method and profiling cache for management of virtual memory includes a set of entries stored in the profiling cache. Each entry of the set of entries includes a page address, a time stamp for the page address and a least recently used (LRU) count; and the LRU count is updated for each access of the page address. Entries in the profiling cache are cast out using the LRU counts. A translation lookaside buffer (TLB) includes a first TLB section for storing a plurality of temporarily pinned entries and a second TLB section for storing a plurality of non-pinned entries. Responsive to a TLB interrupt, an entry is loaded in the second TLB section using a first in first out algorithm for replacing the non-pinned entries. The first TLB portion is periodically updated utilizing identified ones of the set of entries in the profiling cache having oldest time stamps.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: August 8, 2006
    Assignee: International Business Machines Corporation
    Inventors: Kraig Allan Bottemiller, Brent William Jacobs, James A. Pieterick
  • Publication number: 20040073768
    Abstract: A method and profiling cache for management of virtual memory includes a set of entries stored in the profiling cache. Each entry of the set of entries includes a page address, a time stamp for the page address and a least recently used (LRU) count; and the LRU count is updated for each access of the page address. Entries in the profiling cache are cast out using the LRU counts. A translation lookaside buffer (TLB) includes a first TLB section for storing a plurality of temporarily pinned entries and a second TLB section for storing a plurality of non-pinned entries. Responsive to a TLB interrupt, an entry is loaded in the second TLB section using a first in first out algorithm for replacing the non-pinned entries. The first TLB portion is periodically updated utilizing identified ones of the set of entries in the profiling cache having oldest time stamps.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 15, 2004
    Applicant: International Business Machines Corporation
    Inventors: Kraig Allan Bottemiller, Brent William Jacobs, James A. Pieterick