Abstract: A fast frame recorder records images of an event at a fast frame rate and plays back the images at a slower frame rate to facilitate analysis of the event. Disclosed is a solid state fast frame recorder having a solid state imager, which is selectively operable at different frame rates and having a solid state memory for storing a plurality of image frames. A programmable control system controls the memory to store temporally nonconsecutive images from the imager according to a preselected program. Both temporally nonconsecutive single image frames and bursts of temporally consecutive image frames may be stored. The number of image frames in a stored burst and the frame rate of the stored burst may be selectively varied.

Abstract: A system for emulating the memory characteristics of a motor-driven rotat memory having multiple heads per track and/or single heads per track with odd modular memory lengths. It is intended as a cost effective alternative for replacing magnetic rotating memories. The emulation is accomplished by multiplexing an offset memory address during each bit time. Non-volatile memory arrays translate the memory address to an offset address that is proportional to the odd modular track length of the multiple/single head track. Input/output registers are used for each read/write head that is emulated. An emulation address controller is used to generate all timing and initial addresses.