Patents by Inventor Krishan Dhupar

Krishan Dhupar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Time synchronization schemes wherein at least one data message associates a hardware pulse with a future time
    Patent number: 7146516
    Abstract: Schemes for synchronizing networked stations using data messages and hardware pulses are described herein. In one embodiment, a method to provide time data from a first processor to at least one second processor may include transmitting a data message from the first processor to the at least one second processor, in which the data message associates a hardware pulse with a future time, and transmitting a hardware pulse from the first processor to the at least one second processor at the future time.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: December 5, 2006
    Assignee: Invensys Systems, Inc.
    Inventors: Krishan Dhupar, Alan Gale, Alan M. Foskett, Marie Deconto-Thomas
  • Method and apparatus for network fault correction via adaptive fault router
    Publication number: 20050066220
    Abstract: A fault router method and system for use in a parallel redundant network environment provide additional safeguards over traditional redundant networks. Where multiple connection faults on multiple machines would ordinarily stifle communications between two or more network entities, the fault router passes packets between redundant networks to bypass connection faults. Compatibility and timing improvements allow for the extension of the parallel network environment, and provide for time-synchronized network operation.
    Type: Application
    Filed: October 12, 2004
    Publication date: March 24, 2005
    Applicant: Invensys Systems, Inc.
    Inventors: Alan Gale, Richard Coombs, Krishan Dhupar, Alan Foskett, Douglas MacDougall
  • Method and apparatus for network fault correction via adaptive fault router
    Publication number: 20050050379
    Abstract: A fault router method and system for use in a parallel redundant network environment provide additional safeguards over traditional redundant networks. Where multiple connection faults on multiple machines would ordinarily stifle communications between two or more network entities, the fault router passes packets between redundant networks to bypass connection faults. Compatibility and timing improvements allow for the extension of the parallel network environment, and provide for time-synchronized network operation.
    Type: Application
    Filed: October 12, 2004
    Publication date: March 3, 2005
    Applicant: Invensys Systems, Inc.
    Inventors: Alan Gale, Richard Coombs, Krishan Dhupar, Alan Foskett, Douglas MacDougall
  • Time synchronization schemes
    Publication number: 20040123174
    Abstract: Schemes for synchronizing networked stations using data messages and hardware pulses are described herein. In one embodiment, a method to provide time data from a first processor to at least one second processor may include transmitting a data message from the first processor to the at least one second processor, in which the data message associates a hardware pulse with a future time, and transmitting a hardware pulse from the first processor to the at least one second processor at the future time.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Krishan Dhupar, Alan Gale, Alan M. Foskett, Marie Deconto-Thomas