Patents by Inventor Krishna Kishore Bhagavatula

Krishna Kishore Bhagavatula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11842168
    Abstract: An electronic system includes a mapping circuit configured to receive input samples of a dataset within a defined range of values. The mapping circuit is configured to perform comparisons that compare each input sample to each of a plurality of comparison values selected from the defined range of values. For each comparison, the mapping circuit generates an indication value specifying whether the input sample used in the comparison is greater than or equal to the comparison value used in the comparison. The system includes an adder circuit configured to generate a sum of the indication values for each comparison value and a memory configured to maintain counts corresponding to the comparison values. The counts are updated by the respective sums. The system includes a threshold detection circuit configured to determine, for the dataset, a threshold value or threshold range based on the counts read from the memory.
    Type: Grant
    Filed: September 25, 2021
    Date of Patent: December 12, 2023
    Assignee: Xilinx, Inc.
    Inventors: Sai Lalith Chaitanya Ambatipudi, Vamsi Krishna Nalluri, Sandeep Jayant Sathe, Chaithanya Dudha, Krishna Kishore Bhagavatula
  • Publication number: 20230096400
    Abstract: An electronic system includes a mapping circuit configured to receive input samples of a dataset within a defined range of values. The mapping circuit is configured to perform comparisons that compare each input sample to each of a plurality of comparison values selected from the defined range of values. For each comparison, the mapping circuit generates an indication value specifying whether the input sample used in the comparison is greater than or equal to the comparison value used in the comparison. The system includes an adder circuit configured to generate a sum of the indication values for each comparison value and a memory configured to maintain counts corresponding to the comparison values. The counts are updated by the respective sums. The system includes a threshold detection circuit configured to determine, for the dataset, a threshold value or threshold range based on the counts read from the memory.
    Type: Application
    Filed: September 25, 2021
    Publication date: March 30, 2023
    Applicant: Xilinx, Inc.
    Inventors: Sai Lalith Chaitanya Ambatipudi, Vamsi Krishna Nalluri, Sandeep Jayant Sathe, Chaithanya Dudha, Krishna Kishore Bhagavatula