Patents by Inventor Krishna Kumar Manippady

Krishna Kumar Manippady has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220218866
    Abstract: A sanitizing apparatus for sanitizing a fluid is provided. The sanitizing apparatus includes a chamber having an inlet for receiving the fluid thereinto and an outlet for discharging the fluid therefrom, a divider adapted to divide the chamber into an upstream portion in fluid communication with the inlet and a downstream portion in fluid communication with the outlet, a sanitizing light source disposed in the upstream portion and adapted to emit a sanitizing light to sanitize the fluid therein, such that the divider is adapted to obstruct the fluid flow from the inlet to increase the density of the fluid in the upstream portion wherein the fluid is sanitized before being discharged from the chamber via the outlet. A sanitizing method for sanitizing a fluid is provided.
    Type: Application
    Filed: May 20, 2020
    Publication date: July 14, 2022
    Inventors: Ing Jen Cheong, Wei Sheng Lance Tan, Krishna Kumar Manippady
  • Patent number: 10763348
    Abstract: The invention provides a product and a manufacturing process for a high power semiconductor device. The semiconductor device comprises a GaN/AlGaN epilayer structure on an SOI substrate with a thick, uninterrupted GaN layer for use in high-power applications.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: September 1, 2020
    Assignee: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Publication number: 20200105915
    Abstract: The invention provides a product and a manufacturing process for a high power semiconductor device. The semiconductor device comprises a GaN/AlGaN epilayer structure on an SOI substrate with a thick, uninterrupted GaN layer for use in high-power applications.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Applicant: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Patent number: 10546949
    Abstract: Contemplated is a semiconductor device comprising: a substrate; a group (III)-nitride layer; a metal-group (III)-nitride layer deposited between the substrate and group (III)-nitride layer; and a metal-nitride layer deposited between the substrate and the metal-group (III)-nitride layer. Also a method for making a semiconductor device with the above mentioned structure is contemplated. Furthermore, the substrate can be a silicon on insulator (SOI) substrate; the metal-nitride layer can be an aluminium nitride layer; the metal-group (III)-nitride layer can be an aluminium gallium nitride layer; and the group (III)-nitride layer can be a gallium nitride layer.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: January 28, 2020
    Assignee: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Patent number: 9647183
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 9, 2017
    Assignee: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Publication number: 20160049563
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 18, 2016
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Publication number: 20150357451
    Abstract: Contemplated is a semiconductor device comprising: a substrate; a group (III)-nitride layer; a metal-group (III)-nitride layer deposited between the substrate and group (III)-nitride layer; and a metal-nitride layer deposited between the substrate and the metal-group (III)-nitride layer. Also a method for making a semiconductor device with the above mentioned structure is contemplated. Furthermore, the substrate can be a silicon on insulator (SOI) substrate; the metal-nitride layer can be an aluminium nitride layer; the metal-group (III)-nitride layer can be an aluminium gallium nitride layer; and the group (III)-nitride layer can be a gallium nitride layer.
    Type: Application
    Filed: December 23, 2013
    Publication date: December 10, 2015
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmananh, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Patent number: 9202979
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 1, 2015
    Assignee: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Publication number: 20140183448
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 3, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy