Patents by Inventor Krishna M. Kavi

Krishna M. Kavi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for improving computer cache performance and for protecting memory systems against some side channel attacks
    Patent number: 9396135
    Abstract: A physical cache memory that is divided into one or more virtual segments using multiple circuits to decode addresses is provided. An address mapping and an address decoder is selected for each virtual segment. The address mapping comprises two or more address bits as set indexes for the virtual segment and the selected address bits are different for each virtual segment. A cache address decoder is provided for each virtual segment to enhance execution performance of programs or to protect against the side channel attack. Each physical cache address decoder comprises an address mask register to extract the selected address bits to locate objects in the virtual segment. The foregoing can be implemented as a method or apparatus for protecting against a side channel attack.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 19, 2016
    Assignee: University of North Texas
    Inventor: Krishna M. Kavi
  • METHOD AND APPARATUS FOR IMPROVING COMPUTER CACHE PERFORMANCE AND FOR PROTECTING MEMORY SYSTEMS AGAINST SOME SIDE CHANNEL ATTACKS
    Publication number: 20120297110
    Abstract: A physical cache memory that is divided into one or more virtual segments using multiple circuits to decode addresses is provided. An address mapping and an address decoder is selected for each virtual segment. The address mapping comprises two or more address bits as set indexes for the virtual segment and the selected address bits are different for each virtual segment. A cache address decoder is provided for each virtual segment to enhance execution performance of programs or to protect against the side channel attack. Each physical cache address decoder comprises an address mask register to extract the selected address bits to locate objects in the virtual segment. The foregoing can be implemented as a method or apparatus for protecting against a side channel attack.
    Type: Application
    Filed: April 27, 2012
    Publication date: November 22, 2012
    Applicant: UNIVERSITY OF NORTH TEXAS
    Inventor: Krishna M. Kavi