Patents by Inventor Krishna Nittala
Krishna Nittala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12334358Abstract: Exemplary processing methods may include depositing a boron-containing material or a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The methods may include etching portions of the boron-containing material or the silicon-and-boron-containing material with a chlorine-containing precursor to form one or more features in the substrate. The methods may also include removing remaining portions of the boron-containing material or the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor.Type: GrantFiled: July 18, 2021Date of Patent: June 17, 2025Assignee: Applied Materials, Inc.Inventors: Takehito Koshizawa, Karthik Janakiraman, Rui Cheng, Krishna Nittala, Menghui Li, Ming-Yuan Chuang, Susumu Shinohara, Juan Guo, Xiawan Yang, Russell Chin Yee Teo, Zihui Li, Chia-Ling Kao, Qu Jin, Anchuan Wang
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Publication number: 20250112046Abstract: Exemplary semiconductor processing methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a boron-containing precursor into the substrate processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-silicon-containing layer on a substrate in the substrate processing region of the semiconductor processing chamber. The boron-and-silicon-containing layer may be characterized by an increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer opposite the first surface. A flow rate of the boron-containing precursor may be increased during the deposition of the boron-and-silicon-containing layer.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Applicant: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Publication number: 20250056828Abstract: Some implementations herein provide for a memory device and methods of formation. The memory device includes a plurality of storage cells arranged vertically and a plurality of corresponding gate all around transistors. Methods of forming the memory device include using a single trench to remove a liner material and form recesses that define cell contact lightly-doped drain regions of the gate all around transistors. Using the single trench to remove the liner material and form the recesses that define the cell contact lightly-doped drain region widths causes the cell contact lightly-doped drain regions to be formed having substantially similar widths.Type: ApplicationFiled: July 24, 2024Publication date: February 13, 2025Inventors: Si-Woo LEE, Yuichi YOKOYAMA, Scott E. SILLS, Gautham MUTHUSAMY, David HWANG, Yoshitaka NAKAMURA, Pavani Vamsi Krishna NITTALA, Yuanzhi MA, Glen H. WALTERS, Haitao LIU, Kamal M. KARDA
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Publication number: 20250040121Abstract: Methods, systems, and devices for multi-layer capacitors for three-dimensional memory systems are described. Memory cells of a memory system may include capacitors having dielectric material between multiple interfaces (e.g., concentric interfaces) of a bottom electrode and a top electrode. A bottom electrode may include a first portion wrapping around a portion of a semiconductor material that is contiguous with a channel of a transistor, and a top electrode may include a first portion wrapping around the first portion of the bottom electrode. The bottom electrode may also include a second portion wrapping around the first portion of the top electrode, and the top electrode may also include a second portion wrapping around the second portion of the bottom electrode. The dielectric material may include respective portions between each interface of the bottom electrode and top electrode which, in some examples, may be a contiguous implementation of the dielectric material.Type: ApplicationFiled: July 18, 2024Publication date: January 30, 2025Inventors: Yuanzhi Ma, Scott E. Sills, Si-Woo Lee, David K. Hwang, Yoshitaka Nakamura, Yuichi Yokoyama, Pavani Vamsi Krishna Nittala, Glen H. Walters, Gautham Muthusamy, Haitao Liu, Kamal Karda
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Patent number: 12205818Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.Type: GrantFiled: March 15, 2024Date of Patent: January 21, 2025Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Publication number: 20240375348Abstract: A printhead for direct write vapor deposition comprises a nozzle body including a reservoir for holding a material to be printed and a nozzle head protruding from the nozzle body. The nozzle head includes a nozzle opening for ejection of the material as a vapor-phase ink. The nozzle opening is in fluid communication with the reservoir. The nozzle head may protrude from the nozzle body a distance of at least 10 microns. A system for direct write vapor deposition includes the printhead, a heat source positioned to heat the printhead, a substrate in opposition to the nozzle opening for deposition of the vapor-phase ink, and an x-y-z motion stage configured to move the substrate relative to the printhead.Type: ApplicationFiled: May 7, 2024Publication date: November 14, 2024Inventors: SUPRATIK GUHA, PAVANI VAMSI KRISHNA NITTALA, XELLA A DOI
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Patent number: 12131913Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.Type: GrantFiled: June 5, 2023Date of Patent: October 29, 2024Assignee: Applied Materials, Inc.Inventors: Krishna Nittala, Sarah Michelle Bobek, Kwangduk Douglas Lee, Ratsamee Limdulpaiboon, Dimitri Kioussis, Karthik Janakiraman
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Patent number: 12106958Abstract: Embodiments of the present disclosure generally relate to methods for cleaning a chamber comprising introducing a gas to a processing volume of the chamber, providing a first radiofrequency (RF) power having a first frequency of about 40 MHz or greater to a lid of the chamber, providing a second RF power having a second frequency to an electrode disposed in a substrate support within the processing volume, and removing at least a portion of a film disposed on a surface of a chamber component of the chamber. The second frequency is about 10 MHz to about 20 MHz.Type: GrantFiled: June 27, 2023Date of Patent: October 1, 2024Assignee: Applied Materials, Inc.Inventors: Anup Kumar Singh, Rick Kustra, Vinayak Vishwanath Hassan, Bhaskar Kumar, Krishna Nittala, Pramit Manna, Kaushik Alayavalli, Ganesh Balasubramanian
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Publication number: 20240266171Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.Type: ApplicationFiled: March 15, 2024Publication date: August 8, 2024Applicant: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Patent number: 11961739Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.Type: GrantFiled: October 5, 2020Date of Patent: April 16, 2024Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Patent number: 11939674Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: GrantFiled: March 2, 2023Date of Patent: March 26, 2024Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Karthik Janakiraman, Aykut Aydin, Diwakar Kedlaya
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Publication number: 20230407235Abstract: A system and method for mechanical processing of cells includes using a frame (102) forming an inlet channel (104), an outlet channel (106), and a processing chamber (108) fluidly connected between the inlet and outlet channels, wherein the processing chamber includes an anvil surface (112) formed on the frame. A hammer (110) mounted on the frame has a processing surface disposed in opposed relation to the anvil surface. The hammer is configured to move relative to the anvil surface. An actuator connected to the frame and operably associated with the hammer operates to move the hammer relative to the anvil surface and in close proximity to the anvil surface, wherein the hammer operates between a retracted position in which the processing surface is at a distance from the anvil surface, and an extended position in which the processing surface abuts the anvil surface.Type: ApplicationFiled: November 9, 2021Publication date: December 21, 2023Applicants: The University of Chicago, UChicago Argonne, LLCInventors: Anindita BASU, Abhiteja KONDA, Pavani Vamsi Krishna NITTALA, Supratik GUHA
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Patent number: 11827514Abstract: Deposition methods may prevent or reduce crystallization of silicon in a deposited amorphous silicon film that may occur after annealing at high temperatures. The crystallization of silicon may be prevented by doping the silicon with an element. The element may be boron, carbon, or phosphorous. Doping above a certain concentration for the element prevents substantial crystallization at high temperatures and for durations at or greater than 30 minutes. Methods and devices are described.Type: GrantFiled: October 27, 2020Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Krishna Nittala, Karthik Janakiraman, Yi Yang, Gautam K. Hemani
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Publication number: 20230343586Abstract: Embodiments of the present disclosure generally relate to methods for cleaning a chamber comprising introducing a gas to a processing volume of the chamber, providing a first radiofrequency (RF) power having a first frequency of about 40 MHz or greater to a lid of the chamber, providing a second RF power having a second frequency to an electrode disposed in a substrate support within the processing volume, and removing at least a portion of a film disposed on a surface of a chamber component of the chamber. The second frequency is about 10 MHz to about 20 MHz.Type: ApplicationFiled: June 27, 2023Publication date: October 26, 2023Applicant: Applied Materials, Inc.Inventors: Anup Kumar SINGH, Rick KUSTRA, Vinayak Vishwanath HASSAN, Bhaskar KUMAR, Krishna NITTALA, Pramit MANNA, Kaushik ALAYAVALLI, Ganesh BALASUBRAMANIAN
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Publication number: 20230317463Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Inventors: Krishna NITTALA, Sarah Michelle BOBEK, Kwangduk Douglas LEE, Ratsamee LIMDULPAIBOON, Dimitri KIOUSSIS, Karthik JANAKIRAMAN
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Publication number: 20230298892Abstract: Exemplary methods of semiconductor processing may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by a first amount of hydrogen incorporation. The methods may include performing a beamline ion implantation process or plasma doping process on the layer of amorphous silicon. The methods may include removing hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation.Type: ApplicationFiled: July 21, 2021Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Rui Cheng, Rajesh Prasad, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Shan Tang, Qi Gao
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Patent number: 11721545Abstract: Embodiments of the present disclosure generally relate to methods of depositing carbon film layers greater than 3,000 ? in thickness over a substrate and surface of a lid of a chamber using dual frequency, top, sidewall and bottom sources. The method includes introducing a gas to a processing volume of a chamber. A first radiofrequency (RF) power is provided having a first frequency of about 40 MHz or greater to a lid of the chamber. A second RF power is provided having a second frequency to a bias electrode disposed in a substrate support within the processing volume. The second frequency is about 10 MHz to about 40 MHz. An additional third RF power is provided having lower frequency of about 400 kHz to about 2 MHz to the bias electrode.Type: GrantFiled: September 28, 2020Date of Patent: August 8, 2023Assignee: Applied Materials, Inc.Inventors: Anup Kumar Singh, Rick Kustra, Vinayak Vishwanath Hassan, Bhaskar Kumar, Krishna Nittala, Pramit Manna, Kaushik Comandoor Alayavalli, Ganesh Balasubramanian
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Patent number: 11694902Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.Type: GrantFiled: February 18, 2021Date of Patent: July 4, 2023Assignee: Applied Materials, Inc.Inventors: Krishna Nittala, Sarah Michelle Bobek, Kwangduk Douglas Lee, Ratsamee Limdulpaiboon, Dimitri Kioussis, Karthik Janakiraman
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Publication number: 20230203652Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: March 2, 2023Publication date: June 29, 2023Applicant: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Karthik Janakiraman, Aykut Aydin, Diwakar Kedlaya
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Patent number: 11676813Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: GrantFiled: September 18, 2020Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick