Patents by Inventor Krishnamurthi Venkataraman

Krishnamurthi Venkataraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Generalized performance power optimized PLA circuits
    Patent number: 4140921
    Abstract: An array of parallel FET load circuits on an IC (integrated circuit) chip can have their respective signal delays equalized where their nodal capacitances are different or alternately can have their signal delays set for different durations to meet the needs of a subsequent circuit, by adjusting the current driving capacity of a driver driving each circuit to meet the desired delay requirements thereof.
    Type: Grant
    Filed: August 31, 1977
    Date of Patent: February 20, 1979
    Assignee: International Business Machines Corporation
    Inventors: Peruvemba S. Balasubramanian, Stephen B. Greenspan, Krishnamurthi Venkataraman