Patents by Inventor Krishnaraj Venkatesan

Krishnaraj Venkatesan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and methods for IJTAG reduced access time in a hierarchical design
    Patent number: 11635463
    Abstract: A system includes a test access port (TAP) configured to provide internal joint test action group (IJTAG) access to one or more test data registry (TDR). The system further includes a plurality of hierarchical electronic components, wherein each hierarchical electronic component includes a de-asserted segment inserted bit (D-SIB) register, an asserted segment inserted bit (A-SIB) register, and a TDR associated with the D-SIB register. Each D-SIB register is configured to prevent access to its associated TDR when a reset signal is asserted and each A-SIB register is configured to provide access to its subsequent A-SIB register or D-SIB register coupled thereto when the reset signal is asserted.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 25, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Krishnaraj Venkatesan, Raghuveer Shivaraj