Abstract: A system for multicast streaming of programs over a packet network includes a node having a processor that conditions a video bitstream such that packets containing an I-frame are located near program specific information (PSI) packets, the processor marking a random join point (RJP) in the video bitstream immediately preceding the I-frame and PSI packets, the node outputting the conditioned and marked video bitstream across the packet network. An edge device of the network includes a buffer that caches packets of the conditioned and marked video bitstream video starting at the RJP, and sends the cached packets to a client receiver.

Abstract: A method is provided in one example and includes receiving a request to establish a video session between a first user and a second user. The request is sent by the second user by dialing an identifier string associated with the first user. The method also includes evaluating whether the first user has accepted the request. If the first user has not accepted the request over a designated interval, then the second user is directed to an element configured for recording a videomail message for access by the first user. The method also includes identifying the first user has accepted the request, and establishing the video session between the first user and the second user.

Abstract: A system for multicast streaming of programs over a packet network includes a node having a processor that conditions a video bitstream such that packets containing an I-frame are located near program specific information (PSI) packets, the processor marking a random join point (RJP) in the video bitstream immediately preceding the I-frame and PSI packets, the node outputting the conditioned and marked video bitstream across the packet network. An edge device of the network includes a buffer that caches packets of the conditioned and marked video bitstream video starting at the RJP, and sends the cached packets to a client receiver.

Abstract: A system for multicast streaming of programs over a packet network includes a node having a processor that conditions a video bitstream such that packets containing an I-frame are located near program specific information (PSI) packets, the processor marking a random join point (RJP) in the video bitstream immediately preceding the I-frame and PSI packets, the node outputting the conditioned and marked video bitstream across the packet network. An edge device of the network includes a buffer that caches packets of the conditioned and marked video bitstream video starting at the RJP, and sends the cached packets to a client receiver.

Abstract: A symmetric multiprocessor system includes a first processor and a second processor for executing a multi-threaded process on packets, a first inbound interface and a first outbound interface associated with the first processor, a first task queue accessible for reading by the first processor, a second inbound interface and a second outbound interface associated with the second processor, and a second task queue accessible for reading by at least the first processor. The first inbound interface receives incoming packets and has a first input buffer maintaining a first input queue of the packets for processing by the first processor. The first outbound interface receives packets from the first processor and transmits outgoing packets. The first task queue receives packets output from at least the second processor and maintains another input queue of the packets for processing by the first processor and which are outgoing from the first outbound interface.

Abstract: A high reliability computer system includes a first processing engine (PE), a first memory and a third memory both accessible by the first PE, a second PE, and a second memory and a fourth memory both accessible by the second PE. The first memory contains initialization information for the first PE. The third memory has a location for storing an enable password or a surrogate therefor for the first PE. The second memory contains initialization information for the second PE. The computer system also includes circuitry for switching control of the system from the first PE to the second PE upon detection of a failure of the first PE, and a password passer writing the enable password or a surrogate therefor of the first PE to the fourth memory. Alternatively, a network system includes an authentication, authorization and accounting (AAA) or any other password server having a database for maintaining an enable password for a high reliability computer system.

Abstract: The invention is directed to techniques for providing and obtaining, from a network node (e.g., a router, bridge, hub, switch, etc.), resource usage information describing usage of resources within the network node. In one arrangement, a system includes a source computer which provides a data element, and a network node coupled to the source computer. The network node forms at least a portion of a network with the source computer. The network node is configured to receive the data element from the source computer, determine that the data element is stale based on a parameter within the data element, remove the data element from the network and send a signal to the source computer. The signal includes (i) an indication that the network node has removed the data element from the network, and (ii) resource usage information describing usage of resources within the network node.

Abstract: A method for processing packets includes specifying a primary chain of function elements on a primary processor and specifying a secondary chain of function elements on a secondary processor. Each element is operable to perform an operation on a packet. The method further includes selecting one of the primary processor, secondary processor, and combination of the primary and secondary processors to perform a packet-processing function of each element. The packets are processed by walking through the elements on at least one of the primary and secondary chains. A router having a primary and secondary processor is also disclosed. The primary and secondary processors each include a chain generator for generating primary and secondary chains of function elements. Each of the function elements of the primary chain corresponds to one of the function elements of the secondary chain to form a pair of function elements. At least one function element of each pair is configured to perform a packet-processing function.

Abstract: The invention is directed to techniques for measuring resource usage of a computer when processing a data element, using a usage field assigned to the data element. In one arrangement, the computer includes multiple resources, memory and a controller which is coupled to the multiple resources and the memory. The controller operates in accordance with an application stored in the memory to process data elements using different combinations of the multiple resources. In particular, the application configures the controller to assign a usage field to a data element, process the data element using a combination of the multiple resources, and adjust contents of the assigned usage field to identify particular resources of the combination in order to measure resource usage of the computer and detect patterns of resource usage when processing the data element.

Abstract: A symmetric multiprocessor system includes a first processor and a second processor for executing a multi-threaded process on packets, a first inbound interface and a first outbound interface associated with the first processor, a first task queue accessible for reading by the first processor, a second inbound interface and a second outbound interface associated with the second processor, and a second task queue accessible for reading by at least the first processor. The first inbound interface receives incoming packets and has a first input buffer maintaining a first input queue of the packets for processing by the first processor. The first outbound interface receives packets from the first processor and transmits outgoing packets. The first task queue receives packets output from at least the second processor and maintains another input queue of the packets for processing by the first processor and which are outgoing from the first outbound interface.

Abstract: A high reliability computer system includes a first and a second processing engine (PE), circuitry for switching control of the system from the first PE operating as a primary PE to the second PE upon detection of a failure of the first PE, at least one shared resource associated with both the first and second PEs, at least one dedicated resource associated with the first PE and at least one dedicated resource associated with the second PE, a database associated with and accessible by one of the first and second PEs and a configuration engine. The database contains initialization information for the one PE, including a first class of instructions affecting the shared resource and a second class of instructions affecting the dedicated resource of the one PE. The second class of instructions includes setting an enable password or a surrogate therefor for the one PE. The configuration engine is associated with the one PE and is operable in one of a first mode and a second mode.