Abstract: A current sensing circuit may include a shunt resistance through which current to be sensed travels. A first and a second differential amplifier may each provide an amplified output of the voltage across the shunt resistance. A switching system may deliver a current sensing signal output based on the amplified output of the first differential amplifier when the common mode voltage across the shunt resistance is low and based on the amplified output of the second differential amplifier when the common mode voltage across the shunt resistance is high. The first differential amplifier may provide its lowest output DC offset voltage when the common mode voltage is low, while the second differential amplifier may provide its lowest output DC offset voltage when the common mode voltage is high. The first and second differential amplifiers may both have a low common mode voltage rejection ratio, such as a ratio of less than 40 db at the switching frequency of switches that control the current that is sensed.

Abstract: A current sensing circuit may include a shunt resistance through which current to be sensed travels. A first and a second differential amplifier may each provide an amplified output of the voltage across the shunt resistance. A switching system may deliver a current sensing signal output based on the amplified output of the first differential amplifier when the common mode voltage across the shunt resistance is low and based on the amplified output of the second differential amplifier when the common mode voltage across the shunt resistance is high. The first differential amplifier may provide its lowest output DC offset voltage when the common mode voltage is low, while the second differential amplifier may provide its lowest output DC offset voltage when the common mode voltage is high. The first and second differential amplifiers may both have a low common mode voltage rejection ratio, such as a ratio of less than 40 db at the switching frequency of switches that control the current that is sensed.

Abstract: A differential amplifier with a rail-to-rail input stage includes a feedback circuit that maintains the output common mode voltage of the amplifier within a narrow range of an externally supplied value. To reduce harmonic distortions and to further stabilize the output common mode voltage of the amplifier, current is controllably drawn from a biasing circuit coupled to an intermediate stage of the amplifier. Optionally, to reduce harmonic distortions and to further stabilize the output common mode voltage of the amplifier, current is controllably supplied to the intermediate stage of the amplifier.

Abstract: The present invention comprises methods and circuits for increasing the number of selectable gain settings of an amplifier by subtracting gains. In one embodiment, the amplifier is configured with three gain channels that are power-of-three weighted—that is, the gain channels provide gains of 1×, 3× and 9×. By combining the gain values of those gain channels in a manner that adds and/or subtracts the gain values, the amplifier can be configured with any of 13 consecutive gain settings of the same polarity.