Patents by Inventor Kriteshwar K. Kohli
Kriteshwar K. Kohli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11047705Abstract: A method, computer system, and a computer program product for providing a personalized anxiety-reducing navigation system for a user utilizing augmented reality (AR) and virtual reality (VR) is provided. The present invention may include detecting a current location of the user. The present invention may then include, in response to detecting the current location of the user is beyond a comfort boundary threshold, determining a stress state of the user. The present invention may also activate an AR system. The present invention may further, in response to determining the determined stress state of the user is high, activate a VR system.Type: GrantFiled: July 12, 2019Date of Patent: June 29, 2021Assignee: International Business Machines CorporationInventors: Divya Kannan Chakravarthi, Kriteshwar K. Kohli, Vinod A. Valecha, John A. Lyons
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Publication number: 20210010821Abstract: A method, computer system, and a computer program product for providing a personalized anxiety-reducing navigation system for a user utilizing augmented reality (AR) and virtual reality (VR) is provided. The present invention may include detecting a current location of the user. The present invention may then include, in response to detecting the current location of the user is beyond a comfort boundary threshold, determining a stress state of the user. The present invention may also activate an AR system. The present invention may further, in response to determining the determined stress state of the user is high, activate a VR system.Type: ApplicationFiled: July 12, 2019Publication date: January 14, 2021Inventors: DIVYA KANNAN CHAKRAVARTHI, Kriteshwar K. Kohli, Vinod A. Valecha, John A. Lyons
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Patent number: 10386714Abstract: Embodiments of the present disclosure include methods, program products, and systems for creating a knowledge base for optical proximity correction (OPC). Methods according to the disclosure can include: fabricating a circuit using a proposed IC layout; identifying a plurality of features in an image of the fabricated circuit; predicting, based on the identifying and a predictive algorithm, whether the fabricated circuit includes a printed sub-resolution assist feature (SRAF) from the proposed IC layout; determining the predicting as being correct when the fabricated circuit includes the printed SRAF, or as being incorrect when the fabricated circuit does not include the printed SRAF; in response to the predicting being incorrect: adjusting the predictive algorithm, and flagging the fabricated circuit as incorrectly predicted; in response to the predicting being correct, flagging the fabricated circuit as correctly predicted; and storing the image of the fabricated circuit in a repository of training data.Type: GrantFiled: January 9, 2017Date of Patent: August 20, 2019Assignee: GLOBALFOUNDRIES INC.Inventors: Kriteshwar K. Kohli, Mark N. Jobes, Ioana C. Graur
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Patent number: 10192822Abstract: A method for forming a precision resistor or an e-fuse structure where tungsten silicon is used. The tungsten silicon layer is modified by implanting nitrogen into the structure.Type: GrantFiled: February 16, 2015Date of Patent: January 29, 2019Assignee: GLOBALFOUNDRIES INC.Inventors: Domingo A. Ferrer, Kriteshwar K. Kohli, Siddarth A. Krishnan, Joseph F. Shepard, Jr., Keith Kwong Hon Wong
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Publication number: 20180196340Abstract: Embodiments of the present disclosure include methods, program products, and systems for creating a knowledge base for optical proximity correction (OPC). Methods according to the disclosure can include: fabricating a circuit using a proposed IC layout; identifying a plurality of features in an image of the fabricated circuit; predicting, based on the identifying and a predictive algorithm, whether the fabricated circuit includes a printed sub-resolution assist feature (SRAF) from the proposed IC layout; determining the predicting as being correct when the fabricated circuit includes the printed SRAF, or as being incorrect when the fabricated circuit does not include the printed SRAF; in response to the predicting being incorrect: adjusting the predictive algorithm, and flagging the fabricated circuit as incorrectly predicted; in response to the predicting being correct, flagging the fabricated circuit as correctly predicted; and storing the image of the fabricated circuit in a repository of training data.Type: ApplicationFiled: January 9, 2017Publication date: July 12, 2018Inventors: Kriteshwar K. Kohli, Mark N. Jobes, Ioana C. Graur
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Patent number: 10008421Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.Type: GrantFiled: December 5, 2017Date of Patent: June 26, 2018Assignee: International Business Machines CorporationInventors: Donghun Kang, Kriteshwar K. Kohli, Oh-jung Kwon, Anita Madan, Conal E. Murray
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Publication number: 20180096904Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.Type: ApplicationFiled: December 5, 2017Publication date: April 5, 2018Inventors: Donghun Kang, Kriteshwar K. Kohli, Oh-jung Kwon, Anita Madan, Conal E. Murray
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Patent number: 9892979Abstract: A semiconductor device or article includes a substrate including a feature and divided into a feature region in which the feature is formed and a pad region in which the substrate is substantially unmodified, and a layer of interest applied over the substrate and feature. The pad and feature regions are irradiated and resulting photoelectron intensities are recorded and used to determine a thickness of the layer of interest over the feature. In addition, if the layer of interest includes an atomic species distinct from any in the substrate, an actual dose of the atomic species can be determined.Type: GrantFiled: June 19, 2015Date of Patent: February 13, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Kriteshwar K. Kohli, Sean M. Polvino
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Patent number: 9870960Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.Type: GrantFiled: December 18, 2014Date of Patent: January 16, 2018Assignee: International Business Machines CorporationInventors: Donghun Kang, Kriteshwar K. Kohli, Oh-jung Kwon, Anita Madan, Conal E. Murray
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Publication number: 20160372385Abstract: A semiconductor device or article includes a substrate including a feature and divided into a feature region in which the feature is formed and a pad region in which the substrate is substantially unmodified, and a layer of interest applied over the substrate and feature. The pad and feature regions are irradiated and resulting photoelectron intensities are recorded and used to determine a thickness of the layer of interest over the feature. In addition, if the layer of interest includes an atomic species distinct from any in the substrate, an actual dose of the atomic species can be determined.Type: ApplicationFiled: June 19, 2015Publication date: December 22, 2016Inventors: Kriteshwar K. Kohli, Sean M. Polvino
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Publication number: 20160240478Abstract: A method for forming a precision resistor or an e-fuse structure where tungsten silicon is used. The tungsten silicon layer is modified by implanting nitrogen into the structure.Type: ApplicationFiled: February 16, 2015Publication date: August 18, 2016Inventors: Domingo A. Ferrer, Kriteshwar K. Kohli, Siddarth A. Krishnan, Joseph F. Shepard, JR., Keith Kwong Hon Wong
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Publication number: 20160178679Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.Type: ApplicationFiled: December 18, 2014Publication date: June 23, 2016Inventors: Donghun Kang, Kriteshwar K. Kohli, Oh-jung Kwon, Anita Madan, Conal E. Murray
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Patent number: 9201027Abstract: Evaluating a semiconductor wafer may include recording a first intensity of a reflection of an X-ray beam onto a test area on a substrate of the semiconductor wafer at a detector as the X-ray beam is projected substantially perpendicular to a length of expected, periodic structures in the test area and at an angle defined between the X-ray beam and a surface of the test area. Second intensities may be recorded of the reflection of the X-ray beam onto the test area as the X-ray beam is projected onto the test area at increments from the angle. Intensity peaks in the recordings of the first and second intensities are identified and, based on positions of the intensity peaks relative to the test area, a peak spacing between the plurality of expected, periodic structures is determined indicative of pitch walking or epitaxial merge.Type: GrantFiled: February 19, 2014Date of Patent: December 1, 2015Assignee: GLOBALFOUNDRIES Inc.Inventors: Kriteshwar K. Kohli, Patrick E. Lindo, Anita Madan, Teresa L. Pinto
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Publication number: 20150233844Abstract: Evaluating a semiconductor wafer may include recording a first intensity of a reflection of an X-ray beam onto a test area on a substrate of the semiconductor wafer at a detector as the X-ray beam is projected substantially perpendicular to a length of expected, periodic structures in the test area and at an angle defined between the X-ray beam and a surface of the test area. Second intensities may be recorded of the reflection of the X-ray beam onto the test area as the X-ray beam is projected onto the test area at increments from the angle. Intensity peaks in the recordings of the first and second intensities are identified and, based on positions of the intensity peaks relative to the test area, a peak spacing between the plurality of expected, periodic structures is determined indicative of pitch walking or epitaxial merge.Type: ApplicationFiled: February 19, 2014Publication date: August 20, 2015Applicant: International Business Machines CorporationInventors: Kriteshwar K. Kohli, Patrick E. Lindo, Anita Madan, Teresa L. Pinto