Patents by Inventor Krutibas Biswal

Krutibas Biswal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6952810
    Abstract: A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: October 4, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Lawrence Butcher, Krutibas Biswal, Arvind Srinivasan
  • Patent number: 6810507
    Abstract: A technique for simulating and verifying an integrated circuit design are disclosed. Generally speaking, the technique includes storing a unique identifier for the cell generating a root unknown value along with the root unknown value in the results of the simulation. In some embodiments, the same may be done for derived unknown values along with the unique identifier for the root unknown value giving rise to the derived unknown value.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: October 26, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Krutibas Biswal
  • Publication number: 20030208739
    Abstract: A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.
    Type: Application
    Filed: April 14, 2003
    Publication date: November 6, 2003
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Lawrence Butcher, Krutibas Biswal, Arvind Srinivasan
  • Publication number: 20030135838
    Abstract: A technique for simulating and verifying an integrated circuit design are disclosed. Generally speaking, the technique includes storing a unique identifier for the cell generating a root unknown value along with the root unknown value in the results of the simulation. In some embodiments, the same may be done for derived unknown values along with the unique identifier for the root unknown value giving rise to the derived unknown value.
    Type: Application
    Filed: March 28, 2002
    Publication date: July 17, 2003
    Inventor: Krutibas Biswal