Patents by Inventor Krysta M. Svore
Krysta M. Svore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240119108Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.Type: ApplicationFiled: July 21, 2023Publication date: April 11, 2024Inventors: Thomas HAENER, Martin H. ROETTELER, Krysta M. Svore
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Patent number: 11755682Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.Type: GrantFiled: June 29, 2018Date of Patent: September 12, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore
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Patent number: 10664761Abstract: Methods for generating quantum computing circuits by distributing approximation errors in a quantum algorithm are described. A method includes decomposing a quantum algorithm into quantum circuits. The method includes using at least one processor, automatically performing a step-wise decomposition of the quantum algorithm until the quantum algorithm is fully decomposed into the quantum circuits, where the automatically performing the step-wise decomposition results in a set of approximation errors and a set of parameters to instantiate at least a subset of the quantum circuits corresponding to the quantum algorithm, such that an overall approximation error caused by the automatically performing the step-wise decomposition is maintained below a specified threshold approximation error.Type: GrantFiled: June 29, 2018Date of Patent: May 26, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore, Vadym Kliuchnikov
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Publication number: 20190361675Abstract: Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.Type: ApplicationFiled: June 29, 2018Publication date: November 28, 2019Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore
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Publication number: 20190362270Abstract: Methods for generating quantum computing circuits by distributing approximation errors in a quantum algorithm are described. A method includes decomposing a quantum algorithm into quantum circuits. The method includes using at least one processor, automatically performing a step-wise decomposition of the quantum algorithm until the quantum algorithm is fully decomposed into the quantum circuits, where the automatically performing the step-wise decomposition results in a set of approximation errors and a set of parameters to instantiate at least a subset of the quantum circuits corresponding to the quantum algorithm, such that an overall approximation error caused by the automatically performing the step-wise decomposition is maintained below a specified threshold approximation error.Type: ApplicationFiled: June 29, 2018Publication date: November 28, 2019Inventors: Thomas Haener, Martin H. Roetteler, Krysta M. Svore, Vadym Kliuchnikov
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Patent number: 10346413Abstract: Techniques provide time-aware ranking, such as ranking of information, files or URL (uniform resource locator) links. For example, time-aware modeling assists in determining user intent of a query to a search engine. In response to the query, results are ranked in a time-aware manner to better match the user intent. The ranking may model query, URL and query-URL pair behavior over time to create time-aware query, URL and query-URL pair models, respectively. Such models may predict behavior of a query-URL pair, such as frequency and timing of clicks to the URL of the pair when the query of the pair is posed to the search engine. Results of a query may be ranked by predicted query-URL behavior. Once ranked, the results may be sent to the user in response to the query.Type: GrantFiled: January 7, 2016Date of Patent: July 9, 2019Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Kira Radinsky, Susan T. Dumais, Krysta M. Svore, Jaime Brooks Teevan, Eric Joel Horvitz
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Patent number: 10346453Abstract: Methods and systems for multi-tiered information retrieval training are disclosed. A method includes identifying results in a ranked ordering of results that can be swapped without changing a score determined using a first ranking quality measure, determining a first vector and at least one other vector for each identified swappable result in the ranked ordering of results based on the first ranking quality measure and at least one other ranking quality measure respectively, and adding the first vector and the at least one other vector for each identified swappable result in the ranked ordering of results to obtain a function of the first vector and the at least one other vector. Access is provided to the function of the first vector and the at least one other vector for use in the multi-tiered information retrieval training.Type: GrantFiled: December 21, 2010Date of Patent: July 9, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Chris J. C. Burges, Krysta M. Svore, Maksims Volkovs
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Patent number: 10242321Abstract: Repeat-Until-Success (RUS) circuits are compiled in a Clifford+T basis by selecting a suitable cyclotomic integer approximation of a target rotation so that the rotation is approximated within a predetermined precision. The cyclotomic integer approximation is randomly modified until a modified value can be expanded into a single-qubit unitary matrix by solving one or more norm equations. The matrix is then expanded into a two-qubit unitary matrix of special form, which is then decomposed into an optimal two-qubit Clifford+T circuit. A two-qubit RUS circuit using a primary qubit and an ancillary qubit is then obtained based on the latter decomposition. An alternate embodiment is disclosed that keeps the total T-depth of the derived circuit small using at most 3 additional ancilla qubits. Arbitrary unitary matrices defined over the cyclotomic field of 8th roots of unity are implemented with RUS circuits.Type: GrantFiled: April 1, 2015Date of Patent: March 26, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Alexei Bocharov, Krysta M. Svore, Martin Roetteler
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Patent number: 9779359Abstract: 2D nearest-neighbor quantum architectures for Shor's factoring algorithm may be accomplished using the form of three arithmetic building blocks: modular addition using Gossett's carry-save addition, modular multiplication using Montgomery's method, and non-modular multiplication using an original method. These arithmetic building blocks may assume that ancillae are cheap, that concurrent control may be available and scalable, and that execution time may be the bottleneck. Thus, the arithmetic building blocks may be optimized in favor of circuit width to provide improved depth existing nearest-neighbor implementations.Type: GrantFiled: March 14, 2012Date of Patent: October 3, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Krysta M. Svore, Paul Tan The Pham
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Patent number: 9721209Abstract: Methods for compiling single-qubit quantum gates into braid representations for non-Abelian quasiparticles described by the Fibonacci anyon model are based on a probabilistically polynomial algorithm that, given a single-qubit unitary gate and a desired target precision, outputs a braid pattern that approximates the unitary to desired precision and has a length that is asymptotically optimal (for a circuit with such property). Single-qubit unitaries that can be implemented exactly by a Fibonacci anyon braid pattern are classified, and associated braid patterns are obtained using an iterative procedure. Target unitary gates that are not exactly representable as braid patterns are first approximated to a desired precision by a unitary that is exactly representable, then a braid pattern associated with the latter is obtained.Type: GrantFiled: October 14, 2013Date of Patent: August 1, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Vadym Kliuchnikov, Alexei Bocharov, Krysta M. Svore
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Publication number: 20170032272Abstract: Repeat-Until-Success (RUS) circuits are compiled in a Clifford+T basis by selecting a suitable cyclotomic integer approximation of a target rotation so that the rotation is approximated within a predetermined precision. The cyclotomic integer approximation is randomly modified until a modified value can be expanded into a single-qubit unitary matrix by solving one or more norm equations. The matrix is then expanded into a two-qubit unitary matrix of special form, which is then decomposed into an optimal two-qubit Clifford+T circuit. A two-qubit RUS circuit using a primary qubit and an ancillary qubit is then obtained based on the latter decomposition. An alternate embodiment is disclosed that keeps the total T-depth of the derived circuit small using at most 3 additional ancilla qubits. Arbitrary unitary matrices defined over the cyclotomic field of 8th roots of unity are implemented with RUS circuits.Type: ApplicationFiled: April 1, 2015Publication date: February 2, 2017Applicant: Microsoft Technology Licensing, LLCInventors: Alexei Bocharov, Krysta M. Svore, Martin Roetteler
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Patent number: 9514415Abstract: A target quantum circuit expressed in a first quantum gate basis may be transformed into a corresponding quantum circuit expressed in a second quantum gate basis, which may be a universal set of gates such as a V gate basis set. The target quantum circuit may be expressed as a linear combination of quantum gates. The linear combination of quantum gates may be mapped to a quaternion. The quaternion may be factorized, based at least in part on an amount of precision between the target quantum circuit and the corresponding quantum circuit expressed in the second quantum gate basis, into a sequence of quaternion factors. The sequence of quaternion factors may be mapped into a sequence of quantum gates of the second quantum gate basis, where the sequence of sequence of quantum gates is the corresponding quantum circuit.Type: GrantFiled: September 4, 2013Date of Patent: December 6, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Alexei V. Bocharov, Yuri Gurevich, Krysta M. Svore
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Publication number: 20160117333Abstract: Techniques provide time-aware ranking, such as ranking of information, files or URL (uniform resource locator) links. For example, time-aware modeling assists in determining user intent of a query to a search engine. In response to the query, results are ranked in a time-aware manner to better match the user intent. The ranking may model query, URL and query-URL pair behavior over time to create time-aware query, URL and query-URL pair models, respectively. Such models may predict behavior of a query-URL pair, such as frequency and timing of clicks to the URL of the pair when the query of the pair is posed to the search engine. Results of a query may be ranked by predicted query-URL behavior. Once ranked, the results may be sent to the user in response to the query.Type: ApplicationFiled: January 7, 2016Publication date: April 28, 2016Inventors: Kira Radinsky, Susan T. Dumais, Krysta M. Svore, Jaime Brooks Teevan, Eric Joel Horvitz
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Patent number: 9275011Abstract: A quantum phase estimator may include at least one phase gate, at least one controlled unitary gate, and at least one measurement device. The quantum phase estimator receives at least one ancillary qubit and a calculational state comprised of multiple qubits. The phase gate may apply random phases to the ancillary qubit, which is used as a control to the controlled unitary gate. The controlled unitary gate applies a second random phase to the calculational state. The measurement device may measure a state of the ancillary qubit from which a phase of the calculational state may be determined.Type: GrantFiled: June 13, 2013Date of Patent: March 1, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Krysta M. Svore, Matthew B. Hastings, Michael H. Freedman
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Patent number: 9244931Abstract: Techniques provide time-aware ranking, such as ranking of information, files or URL (uniform resource locator) links. For example, time-aware modeling assists in determining user intent of a query to a search engine. In response to the query, results are ranked in a time-aware manner to better match the user intent. The ranking may model query, URL and query-URL pair behavior over time to create time-aware query, URL and query-URL pair models, respectively. Such models may predict behavior of a query-URL pair, such as frequency and timing of clicks to the URL of the pair when the query of the pair is posed to the search engine. Results of a query may be ranked by predicted query-URL behavior. Once ranked, the results may be sent to the user in response to the query.Type: GrantFiled: October 11, 2011Date of Patent: January 26, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Kira Radinsky, Susan T. Dumais, Krysta M Svore, Jaime Brooks Teevan, Eric J. Horvitz
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Publication number: 20150106418Abstract: Methods for compiling single-qubit quantum gates into braid representations for non-Abelian quasiparticles described by the Fibonacci anyon model are based on a probabilistically polynomial algorithm that, given a single-qubit unitary gate and a desired target precision, outputs a braid pattern that approximates the unitary to desired precision and has a length that is asymptotically optimal (for a circuit with such property). Single-qubit unitaries that can be implemented exactly by a Fibonacci anyon braid pattern are classified, and associated braid patterns are obtained using an iterative procedure. Target unitary gates that are not exactly representable as braid patterns are first approximated to a desired precision by a unitary that is exactly representable, then a braid pattern associated with the latter is obtained.Type: ApplicationFiled: October 14, 2013Publication date: April 16, 2015Applicant: Microsoft CorporationInventors: Vadym Kliuchnikov, Alexei Bocharov, Krysta M. Svore
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Patent number: 8935258Abstract: Described is a technology for identifying sample data items (e.g., documents corresponding to query-URL pairs) having the greatest likelihood of being mislabeled when previously judged, and selecting those data items for re-judging. In one aspect, lambda gradient scores (information associated with ranked sample data items that indicates a relative direction and how “strongly” to move each data item for lowering a ranking cost) are summed for pairs of sample data items to compute re-judgment scores for each of those sample data items. The re-judgment scores indicate a relative likelihood of mislabeling. Once the selected sample data items are re-judged, a new training set is available, whereby a new ranker may be trained.Type: GrantFiled: June 15, 2009Date of Patent: January 13, 2015Assignee: Microsoft CorporationInventors: Krysta M. Svore, Elbio Renato Torres Abib, Christopher J. C. Burges, Bhuvan Middha
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Publication number: 20140297708Abstract: A quantum phase estimator may include at least one phase gate, at least one controlled unitary gate, and at least one measurement device. The quantum phase estimator receives at least one ancillary qubit and a calculational state comprised of multiple qubits. The phase gate may apply random phases to the ancillary qubit, which is used as a control to the controlled unitary gate. The controlled unitary gate applies a second random phase to the calculational state. The measurement device may measure a state of the ancillary qubit from which a phase of the calculational state may be determined.Type: ApplicationFiled: June 13, 2013Publication date: October 2, 2014Inventors: Krysta M. Svore, Matthew B. Hastings, Michael H. Freedman
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Publication number: 20140280427Abstract: A target quantum circuit expressed in a first quantum gate basis may be transformed into a corresponding quantum circuit expressed in a second quantum gate basis, which may be a universal set of gates such as a V gate basis set. The target quantum circuit may be expressed as a linear combination of quantum gates. The linear combination of quantum gates may be mapped to a quaternion. The quaternion may be factorized, based at least in part on an amount of precision between the target quantum circuit and the corresponding quantum circuit expressed in the second quantum gate basis, into a sequence of quaternion factors. The sequence of quaternion factors may be mapped into a sequence of quantum gates of the second quantum gate basis, where the sequence of sequence of quantum gates is the corresponding quantum circuit.Type: ApplicationFiled: September 4, 2013Publication date: September 18, 2014Applicant: Microsoft CorporationInventors: Alexei V. Bocharov, Yuri Gurevich, Krysta M. Svore
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Publication number: 20130246495Abstract: 2D nearest-neighbor quantum architectures for Shor's factoring algorithm may be accomplished using the form of three arithmetic building blocks: modular addition using Gossett's carry-save addition, modular multiplication using Montgomery's method, and non-modular multiplication using an original method. These arithmetic building blocks may assume that ancillae are cheap, that concurrent control may be available and scalable, and that execution time may be the bottleneck. Thus, the arithmetic building blocks may be optimized in favor of circuit width to provide improved depth existing nearest-neighbor implementations.Type: ApplicationFiled: March 14, 2012Publication date: September 19, 2013Applicant: Microsoft CorporationInventors: Krysta M. Svore, Paul Tan The Pham