Abstract: Quantum algorithms to solve practical problems in quantum chemistry, materials science, and matrix inversion often involve a significant amount of arithmetic operations. These arithmetic operations are to be carried out in a way that is amenable to the underlying fault-tolerant gate set, leading to an optimization problem to come close to the Pareto-optimal front between number of qubits and overall circuit size. In this disclosure, a quantum circuit library is provided for floating-point addition and multiplication. Circuits are presented that are automatically generated from classical Verilog implementations using synthesis tools and compared with hand-generated and hand-optimized circuits. Example circuits were constructed and tested using the software tools LIQUi| and RevKit.

Abstract: Ripple-carry and carry look-ahead adders for ternary addition and other operations include circuits that produce carry values or carry status indicators that can be stored on qutrit registers associated with input values to be processed. Inverse carry circuits are situated to reverse operations associated with the production of carry values or carry status indicators, and restored values are summed with corresponding carry values to produce ternary sums.

Abstract: In this application, example methods for performing quantum Montgomery arithmetic are disclosed. Additionally, circuit implementations are disclosed for reversible modular arithmetic, including modular addition, multiplication and inversion, as well as reversible elliptic curve point addition. This application also shows that elliptic curve discrete logarithms on an elliptic curve defined over an n-bit prime field can be computed on a quantum computer with at most 9n+2 ?log2(n)?+10 qubits using a quantum circuit of at most 512n3 log2(n)+3572n3 Toffoli gates.

Abstract: The disclosed technology includes, among other innovations, a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. In particular embodiments, the disclosed technology reduces the memory footprint of a reversible network implemented in a quantum computer and generated from a higher-level program. Such a reduced-memory footprint is desirable in that it addresses the limited availability of qubits available in many target quantum computer architectures.

Abstract: Among the embodiments disclosed herein are quantum circuits (and associated compilation techniques) for performing Shor's quantum algorithm to factor n-bit integers. Example embodiments of the circuits use only 2n+2 qubits. In contrast to previous space-optimized implementations, embodiments of the disclosed technology feature a purely Toffoli-based modular multiplication circuit. Certain other example modular multiplication circuits disclosed herein are based on an (in-place) constant-adder that uses dirty ancilla qubits to achieve a size in (n log n) and a depth in (n).

Abstract: Methods of training Boltzmann machines include rejection sampling to approximate a Gibbs distribution associated with layers of the Boltzmann machine. Accepted sample values obtained using a set of training vectors and a set of model values associate with a model distribution are processed to obtain gradients of an objective function so that the Boltzmann machine specification can be updated. In other examples, a Gibbs distribution is estimated or a quantum circuit is specified so at to produce eigenphases of a unitary.

Abstract: Boltzmann machines are trained using an objective function that is evaluated by sampling quantum states that approximate a Gibbs state. Classical processing is used to produce the objective function, and the approximate Gibbs state is based on weights and biases that are refined using the sample results. In some examples, amplitude estimation is used. A combined classical/quantum computer produces suitable weights and biases for classification of shapes and other applications.

Abstract: Methods and systems transform a given single-qubit quantum circuit expressed in a first quantum-gate basis into a quantum-circuit expressed in a second, discrete, quantum-gate basis. The discrete quantum-gate basis comprises standard, implementable quantum gates. The given single-qubit quantum circuit is expressed as a normal representation. The normal representation is generally compressed, in length, with respect to equivalent non-normalized representations. The method and systems additionally can map normal representations to canonical-form representations, which are generally further compressed, in length, with respect to normal representations.

Abstract: Quantum circuits and circuit designs are based on factorizations of diagonal unitaries using a phase context. The cost/complexity of phase sparse/phase dense approximations is compared, and a suitable implementation is selected. For phase sparse implementations in the Clifford+T basis, required entangling circuits are defined based on a number of occurrences of a phase in the phase context in a factor of the diagonal unitary.

Abstract: A Probabilistic Quantum Circuit with Fallback (PQFs) is composed as a series of circuit stages that are selected to implement a target unitary. A final stage is conditioned on unsuccessful results of all the preceding stages as indicated by measurement of one or more ancillary qubits. This final stage executes a fallback circuit that enforces deterministic execution of the target unitary at a relatively high cost (mitigated by very low probability of the fallback). Specific instances of general PQF synthesis method and are disclosed with reference to the specific Clifford+T, Clifford+V and Clifford+?/12 bases. The resulting circuits have expected cost in logb(1/?(log(log(1/?)))+const wherein b is specific to each basis. The three specific instances of the synthesis have polynomial compilation time guarantees.

Abstract: The generation of reversible circuits from high-level code is desirable in a variety of application domains, including low-power electronics and quantum computing. However, little effort has been spent on verifying the correctness of the results, an issue of particular importance in quantum computing where such circuits are run on all inputs simultaneously. Disclosed herein are example reversible circuit compilers as well as tools and techniques for verifying the compilers. Example compilers disclosed herein compile a high-level language into combinational reversible circuits having a reduced number of ancillary bits (ancilla bits) and further having provably clean temporary values.

Abstract: The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate, including a V gate.

Abstract: Nearest neighbor distances are obtained by coherent majority voting based on a plurality of available distance estimates produced using amplitude estimation without measurement in a quantum computer. In some examples, distances are Euclidean distances or are based on inner products of a target vector with vectors from a training set of vectors. Distances such as mean square distances and distances from a data centroid can also be obtained.

Abstract: The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate.

Abstract: The current application is directed to methods and systems which produce a design for an optimal approximation of a target single-qubit quantum operation comprising a representation of a quantum-circuit generated from a discrete, quantum-gate basis. The discrete quantum-gate basis comprises standard, implementable quantum gates. The methods and systems employ a database of canonical-form quantum circuits, an efficiently organized canonical-form quantum-circuit, and efficient searching to identify a minimum-cost design for decomposing and approximating an input target quantum operation.

Abstract: The current application is directed to methods and systems which produce a design for an optimal approximation of a target single-qubit quantum operation comprising a representation of a quantum-circuit generated from a discrete, quantum-gate basis. The discrete quantum-gate basis comprises standard, implementable quantum gates. The methods and systems employ a database of canonical-form quantum circuits, an efficiently organized canonical-form quantum-circuit, and efficient searching to identify a minimum-cost design for decomposing and approximating an input target quantum operation.

Abstract: The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate, including a V gate.

Abstract: The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate.

Abstract: The current application is directed to methods and systems which transform a given single-qubit quantum circuit expressed in a first quantum-gate basis into a quantum-circuit expressed in a second, discrete, quantum-gate basis. The discrete quantum-gate basis comprises standard, implementable quantum gates. The given single-qubit quantum circuit is expressed as a normal representation. The normal representation is generally compressed, in length, with respect to equivalent non-normalized representations. The method and systems additionally provide a mapping from normal representations to canonical-form representations, which are generally further compressed, in length, with respect to normal representations. The normal and canonical-form representations can be used to implement methods and systems for search-based quantum-circuit design. Neither this section nor the sections which follow are intended to either limit the scope of the claims which follow or define the scope of those claims.

Abstract: The current application is directed to methods and systems which produce a design for an optimal approximation of a target single-qubit quantum operation comprising a representation of a quantum-circuit generated from a discrete, quantum-gate basis. The discrete quantum-gate basis comprises standard, implementable quantum gates. The methods and systems employ a database of canonical-form quantum circuits, an efficiently organized canonical-form quantum-circuit, and efficient searching to identify a minimum-cost design for decomposing and approximating an input target quantum operation.