Patents by Inventor Kshitij Doshi
Kshitij Doshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12204471Abstract: In an example, there is disclosed a host-fabric interface (HFI), including: an interconnect interface to communicatively couple the HFI to an interconnect; a network interface to communicatively couple the HFI to a network; network interface logic to provide communication between the interconnect and the network; a coprocessor configured to provide an offloaded function for the network; a memory; and a caching agent configured to: designate a region of the memory as a shared memory between the HFI and a core communicatively coupled to the HFI via the interconnect; receive a memory operation directed to the shared memory; and issue a memory instruction to the memory according to the memory operation.Type: GrantFiled: September 7, 2023Date of Patent: January 21, 2025Assignee: Intel CorporationInventors: Francesc Guim Bernat, Daniel Rivas Barragan, Kshitij A. Doshi, Mark A. Schmisseur
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Patent number: 12204400Abstract: Methods, apparatus, systems, and articles of manufacture to provide a distributed edge-based tracing framework system are disclosed. An example system includes an intermediary generator to generate an intermediary in response to a monitoring request, the intermediary to monitor execution of a service executing in an execution vehicle; an intermediary controller to gather data regarding the monitored execution of the service from the intermediary, and control the intermediary in response to the monitored execution; and a remediator to provide a remediation in response to an error identified in the monitored execution of the service.Type: GrantFiled: September 25, 2020Date of Patent: January 21, 2025Assignee: Intel CorporationInventors: Kshitij Doshi, Ned M. Smith, Francesc Guim Bernat, Katalin Bartfai-Walcott
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Publication number: 20250021621Abstract: Detailed are embodiments related to bit matrix multiplication in a processor. For example, in some embodiments a processor comprising: decode circuitry to decode an instruction have fields for an opcode, an identifier of a first source bit matrix, an identifier of a second source bit matrix, an identifier of a destination bit matrix, and an immediate; and execution circuitry to execute the decoded instruction to perform a multiplication of a matrix of S-bit elements of the identified first source bit matrix with S-bit elements of the identified second source bit matrix, wherein the multiplication and accumulation operations are selected by the operation selector and store a result of the matrix multiplication into the identified destination bit matrix, wherein S indicates a plural bit size is described.Type: ApplicationFiled: June 26, 2024Publication date: January 16, 2025Inventors: Dmitry Y. Babokin, Kshitij A. Doshi, Vadim Sukhomlinov
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Patent number: 12197949Abstract: Technologies for providing attestation for function as a service flavors include a compute device including circuitry configured to obtain function definition data indicative of a set of operations to be performed in a function and a set of hardware resources to be utilized by the function, execute a benchmark operation to produce benchmark data indicative of a measured performance of the function, and sign the function definition data and the benchmark data to produce function flavor data. The circuitry is also configured to provide the function flavor data to one or more other compute devices for validation that the function, when executed on the hardware resources, provides the measured performance and write, to a distributed ledger, the function flavor data.Type: GrantFiled: July 29, 2022Date of Patent: January 14, 2025Assignee: INTEL CORPORATIONInventors: Francesc Guim Bernat, Kshitij Doshi, Ned M. Smith
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Patent number: 12184728Abstract: Methods and apparatus to adaptively manage data collection devices in distributed computing systems are disclosed. Example disclosed methods involve instructing a first data collection device to operate according to a first rule. The example first rule specifies a first operating mode and defining a first event of interest. Example disclosed methods also involve obtaining first data from the first data collection device while operating according to the first rule. Example disclosed methods also involve, in response to determining that the first event of interest has occurred based on the first data, providing a second rule based on the first data to the first data collection device, and providing a third rule to a second data collection device. The example second rule specifies a second operating mode and defines a second event of interest, and the examples third rule specifies a third operating mode.Type: GrantFiled: October 21, 2022Date of Patent: December 31, 2024Assignee: Intel CorporationInventors: Tao Zhong, Gang Deng, Zhongyan Lu, Kshitij Doshi
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Patent number: 12169780Abstract: A mechanism is described for facilitating misuse index for explainable artificial intelligence in computing environments, according to one embodiment. A method of embodiments, as described herein, includes mapping training data with inference uses in a machine learning environment, where the training data is used for training a machine learning model. The method may further include detecting, based on one or more policy/parameter thresholds, one or more discrepancies between the training data and the inference uses, classifying the one or more discrepancies as one or more misuses, and creating a misuse index listing the one or more misuses.Type: GrantFiled: May 25, 2023Date of Patent: December 17, 2024Assignee: Intel CorporationInventors: Glen J. Anderson, Rajesh Poornachandran, Kshitij Doshi
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Patent number: 12153722Abstract: Methods, apparatus, systems, and articles of manufacture to protect proprietary functionality and/or other content in hardware and software are disclosed. An example computer apparatus includes; a first circuit including a first interface, the first circuit associated with a first domain; a second circuit including a second interface, the second circuit associated with a second domain; and a chip manager to generate a first authenticated interface for the first interface using a first token and to generate a second authenticated interface for the second interface using a second token to enable communication between the first authenticated interface and the second authenticated interface.Type: GrantFiled: December 23, 2020Date of Patent: November 26, 2024Inventors: Sunil Cheruvu, Ria Cheruvu, Kshitij Doshi, Francesc Guim Bernat, Ned Smith, Anahit Tarkhanyan
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Patent number: 12112201Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to aggregate telemetry data in an edge environment. An example apparatus includes at least one processor, and memory including instructions that, when executed, cause the at least one processor to at least generate a composition for an edge service in the edge environment, the composition representative of a first interface to obtain the telemetry data, the telemetry data associated with resources of the edge service and including a performance metric, generate a resource object based on the performance metric, generate a telemetry object based on the performance metric, and generate a telemetry executable based on the composition, the composition including at least one of the resource object or the telemetry object, the telemetry executable to generate the telemetry data in response to the edge service executing a computing task distributed to the edge service based on the telemetry data.Type: GrantFiled: January 4, 2022Date of Patent: October 8, 2024Assignee: Intel CorporationInventors: Kshitij Doshi, Francesc Guim Bernat, Timothy Verrall, Ned Smith, Rajesh Gadiyar
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Publication number: 20240320179Abstract: There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.Type: ApplicationFiled: May 31, 2024Publication date: September 26, 2024Applicant: Intel CorporationInventors: Francesc Guim Bernat, Da-Ming Chiang, Kshitij A. Doshi, Suraj Prabhakaran, Mark A. Schmisseur
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Patent number: 12095844Abstract: Methods, apparatus, systems and articles of manufacture for re-use of a container in an edge computing environment are disclosed. An example method includes detecting that a container executed at an edge node of a cloud computing environment is to be cleaned, deleting user data from the container, the deletion of the user data performed without deleting the container from the memory of the edge node, restoring settings of the container to a default state; and storing information identifying the container, the information including a flavor of the container, the storing of the information to enable the container to be re-used by a subsequent requestor.Type: GrantFiled: October 13, 2020Date of Patent: September 17, 2024Assignee: INTEL CORPORATIONInventors: Francesc Guim Bernat, Brinda Ganesh, Timothy Verrall, Ned Smith, Kshitij Doshi
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Patent number: 12068928Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to schedule workloads based on secure edge to device telemetry by calculating a difference between a first telemetric data received from a first hardware device and an operating parameter and computing an adjustment for a second hardware device based on the difference between the first telemetric data and the operating parameter.Type: GrantFiled: September 25, 2020Date of Patent: August 20, 2024Assignee: Intel CorporationInventors: Kapil Sood, Timothy Verrall, Ned M. Smith, Tarun Viswanathan, Kshitij Doshi, Francesc Guim Bernat, John J. Browne, Katalin Bartfai-Walcott, Maryam Tahhan, Eoin Walsh, Damien Power
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Patent number: 12045652Abstract: Technologies for batching requests in an edge infrastructure include a compute device including circuitry configured to obtain a request for an operation to be performed at an edge location. The circuitry is also configured to determine, as a function of a parameter of the obtained request, a batch that the obtained request is to be assigned to. The batch includes a one or more requests for operations to be performed at an edge location. The circuitry is also configured to assign the batch to a cloudlet at an edge location. The cloudlet includes a set of resources usable to execute the operations requested in the batch.Type: GrantFiled: April 21, 2022Date of Patent: July 23, 2024Assignee: INTEL CORPORATIONInventors: Francesc Guim Bernat, Kshitij Doshi, Suraj Prebhakaran, Ned M. Smith
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Patent number: 12045308Abstract: Detailed are embodiments related to bit matrix multiplication in a processor. For example, in some embodiments a processor comprising: decode circuitry to decode an instruction have fields for an opcode, an identifier of a first source bit matrix, an identifier of a second source bit matrix, an identifier of a destination bit matrix, and an immediate; and execution circuitry to execute the decoded instruction to perform a multiplication of a matrix of S-bit elements of the identified first source bit matrix with S-bit elements of the identified second source bit matrix, wherein the multiplication and accumulation operations are selected by the operation selector and store a result of the matrix multiplication into the identified destination bit matrix, wherein S indicates a plural bit size is described.Type: GrantFiled: December 16, 2022Date of Patent: July 23, 2024Assignee: Intel CorporationInventors: Dmitry Y. Babokin, Kshitij A. Doshi, Vadim Sukhomlinov
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Patent number: 12038861Abstract: There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.Type: GrantFiled: October 25, 2022Date of Patent: July 16, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Da-Ming Chiang, Kshitij A. Doshi, Suraj Prabhakaran, Mark A. Schmisseur
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Patent number: 12041177Abstract: Methods, systems and apparatus disclosed herein create an overlay of nodes to permit the nodes to engage in a peer-to-peer resource bidding process. An example apparatus at an edge of a network includes a first configurer to configure a network interface of a first node of the network in a first configuration, the first configuration to permit the first node to participate in a peer-to-peer resource bidding process with a plurality of other nodes of the network. The apparatus further includes a second configurer to configure the network interface of the first node of the network in a second configuration, the second configuration to prevent the first node from participation in the peer-to-peer resource bidding process.Type: GrantFiled: September 25, 2020Date of Patent: July 16, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Ned Smith, Kshitij Doshi, Rajesh Gadiyar
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Patent number: 12032977Abstract: In one embodiment, a computing device comprises memory circuitry and processing circuitry. The memory circuitry is to store a plurality of container images, comprising: a first container image comprising a first set of applications; and a second container image comprising a virtual machine, a guest operating system, and a second set of applications. The processing circuitry is to: instantiate a plurality of containers on a host operating system, wherein the plurality of containers comprises a first container and a second container; execute the first set of applications in the first container, wherein the first set of applications is to be executed on the host operating system; and execute the virtual machine in the second container, wherein the guest operating system is to be executed on the virtual machine and the second set of applications is to be executed on the guest operating system.Type: GrantFiled: May 11, 2020Date of Patent: July 9, 2024Assignee: Intel CorporationInventors: Bryan J. Rodriguez, Kshitij A. Doshi, Ned M. Smith, Michael G. Millsap
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Patent number: 12034597Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control processing of telemetry data at an edge platform. An example apparatus includes an orchestrator interface to, responsive to an amount of resources allocated to an orchestrator to orchestrate a workload at the edge platform meeting a first threshold, transmit telemetry data associated with the orchestrator to a computer to obtain a first orchestration result at a first granularity; a resource management controller to determine a second orchestration result at a second granularity to orchestrate the workload at the edge platform, the second granularity finer than the first granularity; and a scheduler to schedule a workload assigned to the edge platform based on the second orchestration result.Type: GrantFiled: October 8, 2021Date of Patent: July 9, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Kshitij Doshi, Ned Smith, Thijs Metsch
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Publication number: 20240211310Abstract: Technologies for dynamically sharing remote resources include a computing node that sends a resource request for remote resources to a remote computing node in response to a determination that additional resources are required by the computing node. The computing node configures a mapping of a local address space of the computing node to the remote resources of the remote computing node in response to sending the resource request. In response to generating an access to the local address, the computing node identifies the remote computing node based on the local address with the mapping of the local address space to the remote resources of the remote computing node and performs a resource access operation with the remote computing node over a network fabric. The remote computing node may be identified with system address decoders of a caching agent and a host fabric interface. Other embodiments are described and claimed.Type: ApplicationFiled: March 7, 2024Publication date: June 27, 2024Applicant: Intel CorporationInventors: Francesc Guim Bernat, Kshitij A. Doshi, Daniel Rivas Barragan, Alejandro Duran Gonzalez, Harald Servat
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Patent number: 12020078Abstract: Technologies for providing a multi-tenant local breakout switching and dynamic load balancing include a network device to receive network traffic that includes a packet associated with a tenant. Upon a determination that the packet is encrypted, a secret key associated with the tenant is retrieved. The network device decrypts a payload from the packet using the secret key. The payload is indicative of one or more characteristics associated with network traffic. The network device evaluates the characteristics and determines whether the network traffic is associated with a workload requesting compute from a service hosted by a network platform. If so, the network device forwards the network traffic to the service.Type: GrantFiled: December 16, 2021Date of Patent: June 25, 2024Assignee: INTEL CORPORATIONInventors: Francesc Guim Bernat, Ned Smith, Kshitij Doshi, Raghu Kondapalli, Alexander Bachmutsky
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Publication number: 20240195635Abstract: The technology described herein includes a plurality of intellectual property (IP) blocks; and a host IP block, the host IP block including a primary root of trust (RoT) IP block (PRIB) coupled to the plurality of IP blocks, to receive a request from a computing system to establish a secure communications session with a selected one of a plurality of intellectual property (IP) blocks, authenticate and attest the computing system, sign evidence of the PRIB with a PRIB key, send the signed evidence of the PRIB to the computing system, and establish the secure communications session between the computing system and the selected IP block if the PRIB is trusted by the computing system based at least in part on the signed evidence of the PRIB.Type: ApplicationFiled: December 12, 2022Publication date: June 13, 2024Applicant: Intel CorporationInventors: Kshitij Doshi, Ned M. Smith, Rajesh Poornachandran, Sunil K. Cheruvu, David W. Palmer