Patents by Inventor Ku Lin

Ku Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12388435
    Abstract: A power limiting circuit is provided to control operation power of a power device during operation. The power limiting circuit includes a detection circuit and a control circuit. The detection circuit is coupled to the power device. The detection circuit is configured to detect a cross voltage between an input terminal and an output terminal of the power device and generate at least one detection signal associated with the detected cross voltage. The control circuit is coupled to the detection circuit and the power device. The control circuit is configured to generate a control signal based on the at least one detection signal. The control signal is provided to enable or disable the power device to control the operation power of the power device.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: August 12, 2025
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chun-Ku Lin, Jui-Hsiao Hung
  • Publication number: 20250206677
    Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to improve the growth of wheat under low temperature conditions. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the soil containing the wheat seeds. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil containing the wheat seeds.
    Type: Application
    Filed: May 22, 2024
    Publication date: June 26, 2025
    Applicant: CH Biotech R&D Co., Ltd.
    Inventors: Kai XIA, Cheng-Ku LIN, Ya-Ling LIN
  • Publication number: 20250202349
    Abstract: Bonding a full-bridge device and an LLC device in a stack, or forming the full-bridge device and the LLC device on a same substrate, rather than connecting the devices, reduces a chip area associated with a power converter including the full-bridge device and the LLC device. Additionally, the full-bridge device and the LLC device consume less power because parasitic inductance and capacitance are reduced. Additionally, raw materials and production time are conserved that would otherwise have been used to connect the full-bridge device and the LLC device (e.g., via wires).
    Type: Application
    Filed: February 26, 2025
    Publication date: June 19, 2025
    Inventors: Yen-Ku LIN, Ru-Yi SU, Haw-Yun WU, Chun-Lin TSAI
  • Publication number: 20250169507
    Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to promote the growth of wheat plants under low light conditions. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then spray to the wheat leaves at tillering stage. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for for spraying to leaf surface of wheat plants at tillering stage.
    Type: Application
    Filed: April 23, 2024
    Publication date: May 29, 2025
    Applicant: CH Biotech R&D Co., Ltd.
    Inventors: Kai XIA, Cheng-Ku LIN, Yu-Yi WU
  • Publication number: 20250145678
    Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to enhance the drought tolerance attribute of wheat plants. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the soil in which the wheat seeds are planted; the solution can also be sprayed to the leaf surface of young wheat plants. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil around the wheat plants and for spraying to leaf surface of young wheat plants.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 8, 2025
    Applicant: CH Biotech R&D Co., Ltd.
    Inventors: Kai XIA, Cheng-Ku LIN, Ya-Ling LIN
  • Publication number: 20250136524
    Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to improve the efficacy of fertilizer usage and absorption by wheat plants. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the fertilized soil in which the wheat seeds are planted and grown. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil around the wheat plants.
    Type: Application
    Filed: January 15, 2024
    Publication date: May 1, 2025
    Applicant: CH Biotech R&D Co., Ltd.
    Inventors: Kai XIA, Cheng-Ku LIN, Ya-Ling LIN
  • Patent number: 12272708
    Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The photo sensitive regions are in the semiconductor substrate. The dielectric layer is over a backside surface of the semiconductor substrate. The grid structure is over a backside surface of the dielectric layer. The grid structure includes a plurality of grid lines. Each of the grid lines comprises a lower portion and an upper portion forming an interface with the lower portion. The convex dielectric lenses are alternately arranged with the grid lines over the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are higher than an interface between the upper portion and the lower portion of each of the grid lines.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: April 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shiu-Ko Jangjian, Chih-Nan Wu, Chun-Che Lin, Yu-Ku Lin
  • Publication number: 20250107532
    Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to enhance the healthy growth and production yield of wheat crops. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and, at early growth stage, applied to the leaf surface or infused into the soil around the crops. Optionally, the KHP solution can be diluted by water, as taught in the specification, before administering as taught herein.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 3, 2025
    Applicant: CH Biotech R&D Co., Ltd.
    Inventors: Kai XIA, Cheng-Ku LIN, Yu-Lun LIU, Nai-Hua YE
  • Patent number: 12267006
    Abstract: Bonding a full-bridge device and an LLC device in a stack, or forming the full-bridge device and the LLC device on a same substrate, rather than connecting the devices, reduces a chip area associated with a power converter including the full-bridge device and the LLC device. Additionally, the full-bridge device and the LLC device consume less power because parasitic inductance and capacitance are reduced. Additionally, raw materials and production time are conserved that would otherwise have been used to connect the full-bridge device and the LLC device (e.g., via wires).
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ku Lin, Ru-Yi Su, Haw-Yun Wu, Chun-Lin Tsai
  • Publication number: 20240379836
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a gallium nitride (GaN) layer on a substrate; an aluminum gallium nitride (AlGaN) layer disposed on the GaN layer; a gate stack disposed on the AlGaN layer; a source feature and a drain feature disposed on the AlGaN layer and interposed by the gate stack; a dielectric material layer is disposed on the gate stack; and a field plate disposed on the dielectric material layer and electrically connected to the source feature, wherein the field plate includes a step-wise structure.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Wei Wang, Wei-Chen Yang, Yao-Chung Chang, Ru-Yi Su, Yen-Ku Lin, Chuan-Wei Tsou, Chun Lin Tsai
  • Patent number: 12089347
    Abstract: A circuit board, comprising a multi-layer circuit board, a first conductive circuit, a first circuit layer, an adhesion promoter layer, a second conductive circuit, and a second circuit layer. The multi-layer circuit board comprises an inner circuit and an opening. The opening exposes the inner circuit. The first conductive circuit is disposed in the opening and on the inner circuit. The first circuit layer is disposed on the first conductive circuit in the opening and lower than the depth of the opening. The adhesion promoter layer is disposed in the opening and on the surface of the multi-layer circuit board and connected to the first conductive circuit. The second conductive circuit is disposed on the adhesion promoter layer and on the first circuit layer in the opening. The second circuit layer is disposed on the second conductive circuit in the opening and on the second conductive circuit.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: September 10, 2024
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Chun Yi Kuo, Jia Hao Liang, Ching Ku Lin
  • Publication number: 20240121896
    Abstract: The present disclosure provides a circuit board including a first circuit layer, a dielectric layer on the first circuit layer, and a seed layer on the dielectric layer and directly contacting the first circuit layer, in which a top surface of the seed layer includes a levelled portion. The circuit board also includes a second circuit layer on the levelled portion of the seed layer, in which a grain boundary density of the second circuit layer is lower than that of a portion of the seed layer directly contacting the first circuit layer.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 11, 2024
    Inventors: Chien Jung CHEN, Jia Hao LIANG, Ching Ku LIN
  • Publication number: 20240063784
    Abstract: A switch transistor protection device includes a voltage/current detection device and a determination device. The voltage/current detection device is electrically connected to a switch transistor, and used to detect a voltage of the gate, the body, the source or the drain of the switch transistor, or used to detect a current of the source or the drain of the switch transistor to generate a reference voltage. The determination device is electrically connected to the voltage/current detection device and the switch transistor, and used to determine whether the reference voltage exceeds an overcurrent voltage or a fixed maximum junction temperature voltage corresponding to a maximum junction temperature of the switch transistor. When the determination device determines the reference voltage exceeds the maximum junction temperature voltage or the overcurrent voltage, the determination device generates a control signal to the gate, the body, the source or the drain of the switch transistor.
    Type: Application
    Filed: May 30, 2023
    Publication date: February 22, 2024
    Inventors: Jui-Hsiao HUNG, Chun-Ku LIN
  • Publication number: 20240039525
    Abstract: A power limiting circuit is provided to control operation power of a power device during operation. The power limiting circuit includes a detection circuit and a control circuit. The detection circuit is coupled to the power device. The detection circuit is configured to detect a cross voltage between an input terminal and an output terminal of the power device and generate at least one detection signal associated with the detected cross voltage. The control circuit is coupled to the detection circuit and the power device. The control circuit is configured to generate a control signal based on the at least one detection signal. The control signal is provided to enable or disable the power device to control the operation power of the power device.
    Type: Application
    Filed: February 16, 2023
    Publication date: February 1, 2024
    Inventors: Chun-Ku LIN, Jui-Hsiao HUNG
  • Publication number: 20230402937
    Abstract: Bonding a full-bridge device and an LLC device in a stack, or forming the full-bridge device and the LLC device on a same substrate, rather than connecting the devices, reduces a chip area associated with a power converter including the full-bridge device and the LLC device. Additionally, the full-bridge device and the LLC device consume less power because parasitic inductance and capacitance are reduced. Additionally, raw materials and production time are conserved that would otherwise have been used to connect the full-bridge device and the LLC device (e.g., via wires).
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Inventors: Yen-Ku LIN, Ru-Yi SU, Haw-Yun WU, Chun-Lin TSAI
  • Patent number: 11759471
    Abstract: The present invention is concerned with a modified release pharmaceutical composition comprising an effective amount of at least one antipsychotic agent so that the antipsychotic agent(s) are released in such a manner to better accord with physiological and chronotherapeutic requirements of patients.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: September 19, 2023
    Assignee: MEDICAL AND PHARMACEUTICAL INDUSTRY TECHNOLOGY AND DEVELOPMENT CENTER
    Inventors: Shih-Ku Lin, Chih-Chiang Yang, Tse-Ching Lin, Lai-Cheng Chin, Pei Hsuan Ho
  • Publication number: 20230108974
    Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The photo sensitive regions are in the semiconductor substrate. The dielectric layer is over a backside surface of the semiconductor substrate. The grid structure is over a backside surface of the dielectric layer. The grid structure includes a plurality of grid lines. Each of the grid lines comprises a lower portion and an upper portion forming an interface with the lower portion. The convex dielectric lenses are alternately arranged with the grid lines over the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are higher than an interface between the upper portion and the lower portion of each of the grid lines.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 6, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shiu-Ko JANGJIAN, Chih-Nan WU, Chun-Che LIN, Yu-Ku LIN
  • Publication number: 20230092278
    Abstract: The invention discloses a method of improving a wire structure of a circuit board, comprising the following steps: providing a multi-layer circuit board, including an inner circuit and a surface circuit; forming an opening to expose the inner circuit; forming a first circuit layer in the opening; removing the first circuit layer, the first conductive circuit, and the surface circuit on the multi-layer circuit board and removing a part of the first circuit layer in the opening; forming an adhesion promoter layer in the opening and on the multi-layer circuit board; forming a second conductive circuit on the adhesion promoter layer and on the first conductive circuit layer in the opening; forming a photoresist layer on the second conductive circuit layer; forming a second circuit layer in the opening and on the multi-layer circuit board, and removing the photoresist layer and a part of the second conductive circuit.
    Type: Application
    Filed: October 14, 2021
    Publication date: March 23, 2023
    Inventors: Chun Yi Kuo, JIA HAO LIANG, Ching Ku Lin
  • Patent number: 11543847
    Abstract: A band gap reference voltage generating circuit includes a reference voltage generating circuit, a current generating circuit, a current divider circuit, and a first connection path switching circuit. The reference voltage generating circuit forms a reference voltage on first and second current input terminals thereof. First and second input terminals of the current generating circuit are connected to the first and second current input terminals, respectively. The current generating circuit generates a first current to bias the reference voltage generating circuit. The current divider circuit includes a current input terminal, a first current output terminal, and a second current output terminal. The first connection path switching circuit switches connection paths between the first input terminal and the second input terminal of the current generating circuit, and the first current input terminal and the second current input terminal of the current divider circuit.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: January 3, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chang-Xian Wu, Chun-Ku Lin
  • Patent number: 11522001
    Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The plurality of photo sensitive regions are in the semiconductor substrate. The dielectric layer is on a backside surface of the semiconductor substrate facing away from the plurality of photo sensitive regions. The grid structure is on a backside surface of the dielectric layer facing away from the semiconductor substrate. The grid structure includes a plurality of grid lines spaced from each other. The plurality of convex dielectric lenses are alternately arranged with the plurality of grid lines of the grid structure on the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are lower than top ends of the plurality of grid lines of the grid structure.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shiu-Ko Jangjian, Chih-Nan Wu, Chun-Che Lin, Yu-Ku Lin