Abstract: Provided is a power supply device including a power supply unit that supplies a driving voltage for driving at least one or more loads; a current balancing unit that maintains a current balance of the driving voltage supplied to the respective loads; a detection unit that detects currents flowing in the current balancing unit through electromagnetic induction so as to output a detection signal; and a control unit that receives the detection signal to judge whether the loads are opened or not and outputs a control signal for controlling the magnitude of the driving voltage.

Abstract: Provided is a semiconductor package and method of manufacturing the same. The semiconductor package may include a semiconductor chip, an encapsulant encapsulating the semiconductor chip, a lead unit, and a partially encapsulated by the encapsulating thermal stress buffer which absorbs thermal stress of the semiconductor chip or the encapsulant.

Abstract: Provided is a semiconductor plating system for plating a semiconductor object with a desired layer. The semiconductor plating system include a plating tank configured to accommodate a plating solution for use in plating the semiconductor object, and a plating solution induction device configured to induce the plating solution to spirally flow toward the semiconductor object.

Abstract: Disclosed is a flat plate heat transfer device which includes a flat plate case installed between a heat source and a heat dissipating unit and receiving a working fluid evaporated with absorbing heat at the heat source and condensed with dissipating heat at the heat dissipating unit, and at least one layer of mesh installed in the case and formed so that wires are alternatively woven each other horizontally and vertically in turns. A steam passage through which the working fluid may flow is formed along the surface of the wires from the junctions of the mesh.

Abstract: The disclosure pertains to a method for forming a metal layer of a semiconductor device including the steps of: removing a residual native oxide from a contact hole forming a metal junction layer on this contact hole to improve the junction with an inter-layer insulating film, forming a first metal layer in the contact hole to a predetermined thickness under a low pressure to improve step coverage, and forming a second metal layer to a predetermined thickness, thereby planarizing the metal layer. As a result, the step coverage of the bottom surface and side walls of the contact hole is improved, thus preventing defects caused by the disconnection of metal wire of a semiconductor device and improving the economy of the process.

Abstract: The disclosure pertains to a method for forming a metal layer of a semiconductor device including the steps of: removing a residual native oxide from a contact hole forming a metal junction layer on this contact hole to improve the junction with an inter-layer insulating film, forming a first metal layer in the contact hole to a predetermined thickness under a low pressure to improve step coverage, and forming a second metal layer to a predetermined thickness, thereby planarizing the metal layer. As a result, the step coverage of the bottom surface and side walls of the contact hole is improved, thus preventing defects caused by the disconnection of metal wire of a semiconductor device and improving the economy of the process.