Patents by Inventor Kuan-Chang Tsung

Kuan-Chang Tsung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11874307
    Abstract: A signal detection circuit is provided, and includes an input switch circuit, an amplitude detection circuit, a clock generating circuit, and an integration circuit. The input switch circuit receives a reference voltage and an input voltage and selectively outputs the reference voltage or the input voltage. The amplitude detection circuit detects an output of the input switch circuit to generate an amplitude voltage. The clock generating circuit controls the input switch circuit to alternately enter first and second phases, the input switch circuit is controlled to output the reference voltage in the first phase, and output the input voltage in the second phase. The integration circuit receives the amplitude voltage as an input, and generates an integration voltage corresponding to an accumulation result within a predetermined time interval. The predetermined time interval includes at least one period that cycles between the first phase and the second phase.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: January 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ruei-Ming Gan, Kuan-Chang Tsung
  • Patent number: 11677359
    Abstract: A circuit which reuses current to synthesize a negative impedance includes a current source circuit, a differential circuit, and a negative impedance conversion circuit. The current source circuit is arranged to provide at least one predetermined current, wherein the current source circuit has a first connection port and a second connection port, and the first connection port of the current source is coupled to a first reference voltage. The differential circuit is coupled between the second connection port of the current source circuit and a second reference voltage, and is arranged to receive a differential input pair and generate a differential output pair, wherein the differential circuit has a differential output port. The negative impedance conversion circuit is coupled between the differential output port and a third reference voltage, wherein the third reference voltage is different from the first reference voltage.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: June 13, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventor: Kuan-Chang Tsung
  • Publication number: 20230015034
    Abstract: A circuit which reuses current to synthesize a negative impedance includes a current source circuit, a differential circuit, and a negative impedance conversion circuit. The current source circuit is arranged to provide at least one predetermined current, wherein the current source circuit has a first connection port and a second connection port, and the first connection port of the current source is coupled to a first reference voltage. The differential circuit is coupled between the second connection port of the current source circuit and a second reference voltage, and is arranged to receive a differential input pair and generate a differential output pair, wherein the differential circuit has a differential output port. The negative impedance conversion circuit is coupled between the differential output port and a third reference voltage, wherein the third reference voltage is different from the first reference voltage.
    Type: Application
    Filed: October 19, 2021
    Publication date: January 19, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventor: Kuan-Chang Tsung
  • Publication number: 20220357374
    Abstract: A signal detection circuit is provided, and includes an input switch circuit, an amplitude detection circuit, a clock generating circuit, and an integration circuit. The input switch circuit receives a reference voltage and an input voltage and selectively outputs the reference voltage or the input voltage. The amplitude detection circuit detects an output of the input switch circuit to generate an amplitude voltage. The clock generating circuit controls the input switch circuit to alternately enter first and second phases, the input switch circuit is controlled to output the reference voltage in the first phase, and output the input voltage in the second phase. The integration circuit receives the amplitude voltage as an input, and generates an integration voltage corresponding to an accumulation result within a predetermined time interval. The predetermined time interval includes at least one period that cycles between the first phase and the second phase.
    Type: Application
    Filed: October 18, 2021
    Publication date: November 10, 2022
    Inventors: RUEI-MING GAN, KUAN-CHANG TSUNG
  • Patent number: 10454245
    Abstract: A laser diode control circuit includes: a LD driver circuit for driving a laser diode; a direct current component remover circuit for generating a feedback signal based on a detected signal; a first conversion and filter circuit for generating a first filtered signal based on the feedback signal; a first rectifier for rectifying the first filtered signal to generate a first rectified signal; a reference signal generator for generating a reference signal; a second conversion and filter circuit for generating a second filtered signal based on the reference signal; a second rectifier for rectifying the second filtered signal to generate a second rectified signal; a rectified signals processing circuit for generating a processed signal based on the first and second rectified signals; and a comparator for generating a comparison signal based on the processed signal.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: October 22, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Kuan-Chang Tsung, Jian-Ru Lin, Chia-Liang Lin