Patents by Inventor Kuan-Chi Chen

Kuan-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240125736
    Abstract: The present invention relates to a Cu ion sensor, which greatly improves the sensitivity to Cu by a nitrogen-rich surface of a copper nitride thin film doped with a metal material. The present invention also relates to a Cu ion sensing method, in which Cu2+ is detected by contacting the Cu ion sensor of the present invention with the solution to be tested, and using the change in electrical conductivity of a copper nitride film doped with a metal material in the presence of Cu2+ in the solution.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 18, 2024
    Inventors: Sajal BIRING, Sheng-Chi Chen, Annada Sankar SADHU, Min-Chen Chuang, Kuan-Yu Chien
  • Publication number: 20240111849
    Abstract: A media docking device includes an input circuit, an output circuit and a processing circuit. The input circuit is electrically connected to a media source device for receiving media data. The output circuit is electrically connected to a media play device. The processing circuit is electrically connected to the input circuit and the output circuit. The processing circuit determines if a verification procedure is passed. If the verification procedure is passed, the processing circuit transfers the media data to the media play device. If the verification procedure is not passed, the processing circuit limits a transmission of the media data, such that the media data will not be completely played by the media play device.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 4, 2024
    Inventors: Chien-Wei CHEN, Tsung-Han LI, You-Wen CHIOU, Kuan-Chi CHOU, Bo Yu LAI
  • Publication number: 20240114207
    Abstract: A media docking device includes an input module, an output module and a processing module. The input module is electrically connected to a media source device for receiving media data. The output module is electrically connected to a media play device. The processing module determines if an instruction is received from the media source device or a remote device. If the instruction is not received, the processing module transfers the media data to the output module to transmit to the media play device. If the instruction is received, the processing module limits a transmission of the media data according to the instruction, such that the media data will not be completely played by the media play device.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 4, 2024
    Inventors: Chien-Wei CHEN, Tsung-Han LI, You-Wen CHIOU, Kuan-Chi CHOU, Bo Yu LAI
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11916487
    Abstract: An asymmetric half-bridge converter is provided. The asymmetric half-bridge converter includes a switch circuit, a resonance tank, a current sensor, and a controller. The current sensor senses a waveform of a resonance current flowing through the resonance tank to generate a sensing result. The controller determines the sensing result. When the sensing result indicates that an ending current value of a primary resonance waveform of the resonance current is greater than a predetermined value, the controller performs a first switching operation on the switch circuit. When the sensing result indicates that the ending current value of the primary resonance waveform is less than or equal to the predetermined value, the controller performs a second switching operation on the switch circuit.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: February 27, 2024
    Assignee: Power Forest Technology Corporation
    Inventors: Chao-Chang Chiu, Kuan-Chun Fang, Yueh-Chang Chen, Tzu-Chi Huang, Che-Hao Meng
  • Patent number: 11320742
    Abstract: The present disclosure provides a method and a system for generating photomask patterns. The system obtains a design layout image, and generates a hotspot image corresponding to the design layout image based on a hotspot detection model. The system generates two photomask patterns based on the hotspot image. The at least two photomask patterns are transferred onto a semiconductor substrate.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: May 3, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yen-Tung Hu, Kuan-Chi Chen, Ya-Hsuan Wu, Shiuan-Li Lin, Chih-Chung Huang, Chi-Ming Tsai
  • Publication number: 20200133134
    Abstract: The present disclosure provides a method and a system for generating photomask patterns. The system obtains a design layout image, and generates a hotspot image corresponding to the design layout image based on a hotspot detection model. The system generates two photomask patterns based on the hotspot image. The at least two photomask patterns are transferred onto a semiconductor substrate.
    Type: Application
    Filed: June 6, 2019
    Publication date: April 30, 2020
    Inventors: YEN-TUNG HU, KUAN-CHI CHEN, YA-HSUAN WU, SHIUAN-LI LIN, CHIH-CHUNG HUANG, CHI-MING TSAI
  • Patent number: 9898189
    Abstract: A user trial feedback method, an electronic device, and a computer-readable medium are provided. The user trial feedback method includes the following steps. A launch signal is received to record an image of current frame of the touch screen and launch the user trial feedback tool. An information is inputted by the user in the user trail feedback tool, and logs related to the inputted information are collected and upload to a server along with the recorded image of the current frame.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: February 20, 2018
    Assignee: HTC Corporation
    Inventors: Wan-Yun Chen, Kuan-Chuan Su, Kuan-Chi Chen
  • Patent number: 9659128
    Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: May 23, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
  • Publication number: 20150302127
    Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
    Type: Application
    Filed: June 29, 2015
    Publication date: October 22, 2015
    Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
  • Publication number: 20150264133
    Abstract: A user trial feedback method, an electronic device, and a computer-readable medium are provided. The user trial feedback method includes the following steps. A launch signal is received to record an image of current frame of the touch screen and launch the user trial feedback tool. An information is inputted by the user in the user trail feedback tool, and logs related to the inputted information are collected and upload to a server along with the recorded image of the current frame.
    Type: Application
    Filed: March 17, 2015
    Publication date: September 17, 2015
    Applicant: HTC CORPORATION
    Inventors: Wan-Yun CHEN, Kuan-Chuan SU, Kuan-Chi CHEN
  • Patent number: 9104831
    Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: August 11, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
  • Publication number: 20150058817
    Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 26, 2015
    Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
  • Patent number: 8555211
    Abstract: A method of making a mask includes receiving an IC design layout from a designer, applying an logic operation (LOP) correction, performing an OPC correction, fracturing the modified data into a plurality of main features in an electron beam format, and sending the electron beam format data to a mask writer for a mask fabrication. An XOR operation is implemented into the method to check and verify if a pattern is lost during OPC modification and/or data fracture. A BACKBONE XOR operation is also implemented into the method for a plurality of main features with a critical dimension (CD) size smaller than the max OPC correction to check and verify if a small pattern feature is lost during OPC modification and/or data fracture for 45 nm and beyond semiconductor technologies.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 8, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Guei Jou, Kuan-Chi Chen, Peng-Ren Chen, Dong-Hsu Cheng
  • Publication number: 20130239072
    Abstract: A method of making a mask includes receiving an IC design layout from a designer, applying an logic operation (LOP) correction, performing an OPC correction, fracturing the modified data into a plurality of main features in an electron beam format, and sending the electron beam format data to a mask writer for a mask fabrication. An XOR operation is implemented into the method to check and verify if a pattern is lost during OPC modification and/or data fracture. A BACKBONE XOR operation is also implemented into the method for a plurality of main features with a critical dimension (CD) size smaller than the max OPC correction to check and verify if a small pattern feature is lost during OPC modification and/or data fracture for 45 nm and beyond semiconductor technologies.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 12, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-Guei Jou, Kuan-Chi Chen, Peng-Ren Chen, Dong-Hsu Cheng