Patents by Inventor Kuan-Chi Chen
Kuan-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240210995Abstract: A display may have a stretchable portion with hermetically sealed rigid pixel islands. A flexible interconnect region may be interposed between the hermetically sealed rigid pixel islands. The hermetically sealed rigid pixel islands may include organic light-emitting diode (OLED) pixels. A conductive cutting structure may have an undercut that causes a discontinuity in a conductive OLED layer to mitigate lateral leakage. The conductive cutting structure may also be electrically connected to a cathode for the OLED pixels and provide a cathode voltage to the cathode. First and second inorganic passivation layers may be formed over the OLED pixels. Multiple discrete portions of an organic inkjet printed layer may be interposed between the first and second inorganic passivation layers.Type: ApplicationFiled: October 10, 2023Publication date: June 27, 2024Inventors: Prashant Mandlik, Bhadrinarayana Lalgudi Visweswaran, Mahendra Chhabra, Chia-Hao Chang, Shiyi Liu, Siddharth Harikrishna Mohan, Zhen Zhang, Han-Chieh Chang, Yi Qiao, Yue Cui, Tyler R Kakuda, Michael Vosgueritchian, Sudirukkuge T. Jinasundera, Warren S Rieutort-Louis, Tsung-Ting Tsai, Jae Won Choi, Jiun-Jye Chang, Jean-Pierre S Guillou, Rui Liu, Po-Chun Yeh, Chieh Hung Yang, Ankit Mahajan, Takahide Ishii, Pei-Ling Lin, Pei Yin, Gwanwoo Park, Markus Einzinger, Martijn Kuik, Abhijeet S Bagal, Kyounghwan Kim, Jonathan H Beck, Chiang-Jen Hsiao, Chih-Hao Kung, Chih-Lei Chen, Chih-Yu Chung, Chuan-Jung Lin, Jung Yen Huang, Kuan-Chi Chen, Shinya Ono, Wei Jung Hsieh, Wei-Chieh Lin, Yi-Pu Chen, Yuan Ming Chiang, An-Di Sheu, Chi-Wei Chou, Chin-Fu Lee, Ko-Wei Chen, Kuan-Yi Lee, Weixin Li, Shin-Hung Yeh, Shyuan Yang, Themistoklis Afentakis, Asli Sirman, Baolin Tian, Han Liu
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Patent number: 11320742Abstract: The present disclosure provides a method and a system for generating photomask patterns. The system obtains a design layout image, and generates a hotspot image corresponding to the design layout image based on a hotspot detection model. The system generates two photomask patterns based on the hotspot image. The at least two photomask patterns are transferred onto a semiconductor substrate.Type: GrantFiled: June 6, 2019Date of Patent: May 3, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yen-Tung Hu, Kuan-Chi Chen, Ya-Hsuan Wu, Shiuan-Li Lin, Chih-Chung Huang, Chi-Ming Tsai
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Publication number: 20200133134Abstract: The present disclosure provides a method and a system for generating photomask patterns. The system obtains a design layout image, and generates a hotspot image corresponding to the design layout image based on a hotspot detection model. The system generates two photomask patterns based on the hotspot image. The at least two photomask patterns are transferred onto a semiconductor substrate.Type: ApplicationFiled: June 6, 2019Publication date: April 30, 2020Inventors: YEN-TUNG HU, KUAN-CHI CHEN, YA-HSUAN WU, SHIUAN-LI LIN, CHIH-CHUNG HUANG, CHI-MING TSAI
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Patent number: 9898189Abstract: A user trial feedback method, an electronic device, and a computer-readable medium are provided. The user trial feedback method includes the following steps. A launch signal is received to record an image of current frame of the touch screen and launch the user trial feedback tool. An information is inputted by the user in the user trail feedback tool, and logs related to the inputted information are collected and upload to a server along with the recorded image of the current frame.Type: GrantFiled: March 17, 2015Date of Patent: February 20, 2018Assignee: HTC CorporationInventors: Wan-Yun Chen, Kuan-Chuan Su, Kuan-Chi Chen
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Patent number: 9659128Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.Type: GrantFiled: June 29, 2015Date of Patent: May 23, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
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Publication number: 20150302127Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.Type: ApplicationFiled: June 29, 2015Publication date: October 22, 2015Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
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Publication number: 20150264133Abstract: A user trial feedback method, an electronic device, and a computer-readable medium are provided. The user trial feedback method includes the following steps. A launch signal is received to record an image of current frame of the touch screen and launch the user trial feedback tool. An information is inputted by the user in the user trail feedback tool, and logs related to the inputted information are collected and upload to a server along with the recorded image of the current frame.Type: ApplicationFiled: March 17, 2015Publication date: September 17, 2015Applicant: HTC CORPORATIONInventors: Wan-Yun CHEN, Kuan-Chuan SU, Kuan-Chi CHEN
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Patent number: 9104831Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.Type: GrantFiled: August 23, 2013Date of Patent: August 11, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
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Publication number: 20150058817Abstract: Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.Type: ApplicationFiled: August 23, 2013Publication date: February 26, 2015Inventors: Po-Chang Huang, Ying Ying Wang, Shellin Liu, Kuan-Chi Chen
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Patent number: 8555211Abstract: A method of making a mask includes receiving an IC design layout from a designer, applying an logic operation (LOP) correction, performing an OPC correction, fracturing the modified data into a plurality of main features in an electron beam format, and sending the electron beam format data to a mask writer for a mask fabrication. An XOR operation is implemented into the method to check and verify if a pattern is lost during OPC modification and/or data fracture. A BACKBONE XOR operation is also implemented into the method for a plurality of main features with a critical dimension (CD) size smaller than the max OPC correction to check and verify if a small pattern feature is lost during OPC modification and/or data fracture for 45 nm and beyond semiconductor technologies.Type: GrantFiled: March 9, 2012Date of Patent: October 8, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jia-Guei Jou, Kuan-Chi Chen, Peng-Ren Chen, Dong-Hsu Cheng
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Publication number: 20130239072Abstract: A method of making a mask includes receiving an IC design layout from a designer, applying an logic operation (LOP) correction, performing an OPC correction, fracturing the modified data into a plurality of main features in an electron beam format, and sending the electron beam format data to a mask writer for a mask fabrication. An XOR operation is implemented into the method to check and verify if a pattern is lost during OPC modification and/or data fracture. A BACKBONE XOR operation is also implemented into the method for a plurality of main features with a critical dimension (CD) size smaller than the max OPC correction to check and verify if a small pattern feature is lost during OPC modification and/or data fracture for 45 nm and beyond semiconductor technologies.Type: ApplicationFiled: March 9, 2012Publication date: September 12, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Guei Jou, Kuan-Chi Chen, Peng-Ren Chen, Dong-Hsu Cheng