Abstract: The present invention relates to an ultrasound image enhancement processing system and method thereof. The ultrasound image enhancement processing system includes at least one first ultrasound device and at least one server apparatus. The server apparatus receives a first ultrasound original image file, processes the first ultrasound original image file through a speckle reduction algorithm to generate a first processed image file, and performs a deep learning training on the first ultrasound original image file and the first processed image file to generate a first neural network model. The first neural network learning module is used to output a first speckle reduction enhancement image file. The image content of the first speckle reduction enhancement image file is approximating to the image content of the first processed image file.

Abstract: The present invention relates to a license plate identification system and method thereof. The license plate identification system comprises at least a server apparatus storing at least one license plate picture file to be identified and a plurality of license plate sample picture files. Each of the license plate sample picture files has a double-row of character. Through deep learning training, the system generates a neural network model, inputs the license plate picture file to be identified into the neural network model for outputting analysis result information, and decodes the analysis result information through a decoding algorithm to obtain an identification license plate character content.

Abstract: A tape measure includes a housing having an interior surface with a post mount protruding therefrom, and a post having a shaft extending from a keyed shape. The post and the post mount are configured such that the post is slid laterally along the interior surface until the post mount is received in the keyed shape. The keyed shape is configured to prevent rotation of the shaft relative to the housing once the keyed shape is received in the post mount.

Abstract: A tape measure includes a housing with first and second housing portions; a reel configured to be secured between the first and second housing portions, the reel containing a tape blade wound thereon and partially extending therefrom terminating in a hook portion; and an integral component coupled to the first and second housing portions, including an aperture defining a finger brake, the finger brake exposing the tape blade for engagement by a user. The tape blade is biased to retract into the housing, winding around the reel, such that in a fully retracted position the hook portion abuts the portion of the mouth of the tape measure. In an extended position the tape blade is unwound from the reel such that the hook extends away from the integral component. An integral component including an aperture defining a tape measure mouth and a light emitter receiving slot is also disclosed.

Abstract: A tape measure includes a housing having an interior surface with a post mount protruding therefrom, and a post having a shaft extending from a keyed shape. The post and the post mount are configured such that the post is slid laterally along the interior surface until the post mount is received in the keyed shape. The keyed shape is configured to prevent rotation of the shaft relative to the housing once the keyed shape is received in the post mount.

Abstract: Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.

Abstract: A memory device, an error correction device and an error correction method thereof are provided. The error correction device includes a first error correction decoder and a second error correction decoder. The first error correction decoder performs at least one iteration of a first error correction operation on a data chunk, calculates a counting number of syndrome values equal to a set logic value generated in the at least one iteration of the first error correction operation, and generates a control signal according to the counting number. The second error correction decoder receives the control signal and determines whether to be activated to perform a second error correction operation on the data chunk or not according to the control signal. An error correction ability of the second error correction decoder is higher than an error correction ability of the first error correction decoder.

Abstract: A memory device, an error correction device and an error correction method thereof are provided. The error correction device includes a first error correction decoder and a second error correction decoder. The first error correction decoder performs at least one iteration of a first error correction operation on a data chunk, calculates a counting number of syndrome values equal to a set logic value generated in the at least one iteration of the first error correction operation, and generates a control signal according to the counting number. The second error correction decoder receives the control signal and determines whether to be activated to perform a second error correction operation on the data chunk or not according to the control signal. An error correction ability of the second error correction decoder is higher than an error correction ability of the first error correction decoder.

Abstract: A solid state disk, a data transmitting method and an intermediary controller thereof are provided. The solid state disk includes at least two flash memories, a SSD controller and an intermediary controller. The intermediary controller is connected between the flash memories and the SSD controller. The intermediary controller includes at least two flash interfaces, a customized interface and a data buffering unit. The flash interfaces are connected to the flash memories. The customized interface is connected to the SSD controller. The intermediary controller has a first clock domain and a second clock domain. The first clock domain is used for transmitting data from the flash memories to the data buffering unit. The second clock domain is used for transmitting data from the data buffering unit to the SSD controller. A frequency of the second clock domain is higher than a frequency of the first clock domain.

Abstract: A solid state disk, a data transmitting method and an intermediary controller thereof are provided. The solid state disk includes at least two flash memories, a SSD controller and an intermediary controller. The intermediary controller is connected between the flash memories and the SSD controller. The intermediary controller includes at least two flash interfaces, a customized interface and a data buffering unit. The flash interfaces are connected to the flash memories. The customized interface is connected to the SSD controller. The intermediary controller has a first clock domain and a second clock domain. The first clock domain is used for transmitting data from the flash memories to the data buffering unit. The second clock domain is used for transmitting data from the data buffering unit to the SSD controller. A frequency of the second clock domain is higher than a frequency of the first clock domain.

Abstract: Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.

Abstract: Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.

Abstract: Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.

Abstract: A pharmaceutical composition for use in promoting wound healing and/or accelerating closure of an open wound in a subject in need thereof is disclosed. The composition comprises a therapeutically effective amount of a recombinant polypeptide comprising an amino acid sequence that is at least 80% identical to the amino acid sequence of SEQ ID NO: 2; and a pharmaceutically acceptable vehicle, carrier, diluent, excipients, and/or salt.

Abstract: A pharmaceutical composition for use in promoting wound healing and/or accelerating closure of an open wound in a subject in need thereof is disclosed. The composition comprises a therapeutically effective amount of a recombinant polypeptide comprising an amino acid sequence that is at least 80% identical to the amino acid sequence of SEQ ID NO: 2; and a pharmaceutically acceptable vehicle, carrier, diluent, excipients, and/or salt.

Abstract: An electronic device for finding error locations in a codeword includes a plurality of power control units configured to find error locations in the codeword. The plurality of power control units are coupled in parallel. Each of the plurality of power control units includes a plurality of corresponding input control circuits to individually turn on or off the corresponding power control unit.

Abstract: An electronic device for finding error locations in a codeword includes a plurality of power control units configured to find error locations in the codeword. The plurality of power control units are coupled in parallel. Each of the plurality of power control units includes a plurality of corresponding input control circuits to individually turn on or off the corresponding power control unit.

Abstract: A method of dynamic resource allocation for a virtual machine cluster is to calculate the resource usage weight of the respective virtual machine, the resource usage weight of the respective physical machine, and the average resource usage weight of the physical machines, to pick the physical machine with the greatest resource usage weight as the migration source machine, to pick the physical machine with the least resource usage weight as the migration object machine, and to move the virtual machine in the migration source machine with the resource usage weight thereof being closest to the migration difference value to the migration object machine to achieve the effect of load balancing.

Abstract: A light emitting diode display panel includes a substrate and a plurality of pixels. The substrate includes a plurality of transverse signal lines and a plurality of longitudinal signal lines crossing each other. The pixels are mounted on the substrate in a matrix form. Each pixel includes a plurality of LEDs. The LEDs are electrically connected to one of the transverse signal lines and one of the longitudinal signal lines.

Abstract: A method for managing green power determines if how many physical machines should run or be shut off with the gross occupied resource weight ratio of the virtual machine cluster. The standby physical machine in the non-running physical machines is elected and woke up to join as one of the running physical machines; one of the running physical machines is elected as a migration physical machine with the virtual machines therein being moved to other running physical machines, and then shut off. The resource allocation process is conducted to distribute loads of the running physical machines such that the total numbers of the running physical machines are capable of being dispatched flexibly to achieve the object of green power management.