Patents by Inventor Kuan-Chu Wu

Kuan-Chu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12238864
    Abstract: An electronic apparatus including a compression molding board and a connection pad is provided. The compression molding board has a device bonding area and a bending area formed by compression molding. The device bonding area is different from the bending area. The connection pad is disposed on the device bonding area of the compression molding board.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: February 25, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Lin Hsu, Kuan-Chu Wu, Ting-Yu Ke, Min-Hsiung Liang, Yu-Ming Peng
  • Patent number: 12211811
    Abstract: An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: January 28, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Ming Peng, Chien-Chou Tseng, Chih-Chia Chang, Kuan-Chu Wu, Yu-Lin Hsu
  • Publication number: 20240341653
    Abstract: A flexible electronic device includes a first encapsulation layer and a sensing structure. The sensing structure is disposed on the first encapsulation layer and includes a substrate, a plurality of first sensing layer, a plurality of second sensing layer, a first groove and a second groove. The substrate includes a main body, a plurality of first branches and a plurality of second branches. The main body has a first side and a second side opposite to each other. The first branches connect the first side. The second branches connect the second side. The first sensing layers are disposed on the first branches. The second sensing layers are disposed on the second branches. The first groove is disposed between the first branches. The second groove is disposed between the second branches.
    Type: Application
    Filed: January 24, 2024
    Publication date: October 17, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Min-Hsiung Liang, Chien-Hsun Chu, Kuan-Chu Wu, Wan-Chen Yang, Jui-Chang Chuang, Chen-Tsai Yang, Heng-Yin Chen, Hung-Hsien Ko
  • Publication number: 20230199961
    Abstract: An electronic apparatus including a compression molding board and a connection pad is provided. The compression molding board has a device bonding area and a bending area formed by compression molding. The device bonding area is different from the bending area. The connection pad is disposed on the device bonding area of the compression molding board.
    Type: Application
    Filed: March 24, 2022
    Publication date: June 22, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Lin Hsu, Kuan-Chu Wu, Ting-Yu Ke, Min-Hsiung Liang, Yu-Ming Peng
  • Publication number: 20230154877
    Abstract: An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.
    Type: Application
    Filed: March 24, 2022
    Publication date: May 18, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Ming Peng, Chien-Chou Tseng, Chih-Chia Chang, Kuan-Chu Wu, Yu-Lin Hsu
  • Patent number: 11362045
    Abstract: A chip package structure including a substrate, a redistribution layer (RDL), a chip and an encapsulant is provided. The RDL is disposed on the substrate. The chip is disposed on the RDL and is electrically connected with the RDL. The encapsulant is disposed on the RDL and encapsulates the chip. The chip is located in the high stress region. From a top view, the chip is located in the high stress region, and the low stress region surrounds the high stress region. The RDL includes at least one first device located in the high stress region. From the top view, the extending direction of the at least one first device is parallel to a stress direction at a position thereof.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: June 14, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Te-Hsun Lin, Chen-Tsai Yang, Kuan-Chu Wu, Shao-An Yan
  • Publication number: 20210183789
    Abstract: A chip package structure including a substrate, a redistribution layer (RDL), a chip and an encapsulant is provided. The RDL is disposed on the substrate. The chip is disposed on the RDL and is electrically connected with the RDL. The encapsulant is disposed on the RDL and encapsulates the chip. The chip is located in the high stress region. From a top view, the chip is located in the high stress region, and the low stress region surrounds the high stress region. The RDL includes at least one first device located in the high stress region. From the top view, the extending direction of the at least one first device is parallel to a stress direction at a position thereof.
    Type: Application
    Filed: February 18, 2020
    Publication date: June 17, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Te-Hsun Lin, Chen-Tsai Yang, Kuan-Chu Wu, Shao-An Yan
  • Patent number: 10757804
    Abstract: A flexible hybrid electronic (FHE) system includes a carrier, a first redistribution structure on the carrier, a first device on the first redistribution structure, and an encapsulation layer encapsulating the first device. The carrier has a first Young's modulus Y1. The first redistribution structure has a second Young's modulus Y2. The first device and a portion of the encapsulation layer form a top surface of the first redistribution structure to a top surface of the first device is a first portion having a third Young's modulus Y3. The other portion of the encapsulation layer from the top surface of the first device to a top surface of the encapsulation layer is a second portion having a fourth Young's modulus Y4. A ratio of Y3/Y4 is between 1.62 and 1.98; a ratio of Y3/Y2 is between 0.18 and 0.22; and a ratio of Y3/Y1 is between 280.62 and 342.98.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: August 25, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Ming Peng, Kuan-Chu Wu, Kai-Ming Chang, Chen-Tsai Yang