Abstract: A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, and a probe head including a guide plate located below the substrate portion and having a plurality of openings through the guide plate, and a conductive trace on the guide plate that extends between a pair of the openings. A plurality of probe pins extend through the openings through the guide plate, where a pair of probe pins are electrically connected by the conductive trace to form a loopback signal path. Accordingly, the loopback signals may be routed through the conductive trace located on and/or within the guide plate rather than through the substrate portion of the probe card. This may significantly reduce the total length of the loopback signal path, which may thereby improve the signal integrity (SI) during loopback testing of a device-under-test.

Abstract: A chip testing structure is provided. The chip testing structure includes a probe head including a substrate and a first needle passing through the substrate. The chip testing structure includes a wiring substrate over the probe head. The wiring substrate includes an insulating layer and a conductive structure in the insulating layer. The chip testing structure includes a housing structure over the wiring substrate. The housing structure has a chamber. The chip testing structure includes a second needle passing through the housing structure and connected to the conductive structure of the wiring substrate. The chip testing structure includes a chip-containing structure in the chamber and electrically connected to the first needle through the second needle and the conductive structure of the wiring substrate.

Abstract: A solid-state storage device is provided, which includes a controller and a non-volatile memory. The controller selects a first word line group from a plurality of word line groups obtained by classifying the word lines based on a read threshold voltage of each word line, and a representative word line corresponding to each word line group is set based on the read threshold voltage associated with each word line group. The controller uses the read threshold voltage of a first representative word line corresponding to the first word line group to read page data of the first representative word line. When the controller cannot correctly read the page data of the first representative word line using the read threshold voltage of the first representative word line, the controller updates the read threshold voltage of the first representative word line in the first word line group.

Abstract: A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, a guide plate having a plurality of openings, and a plurality of probe pins extending through the openings, including at least one first probe pin configured to carry power between the substrate portion and a device-under-test (DUT), at least one second probe pin configured to electrically couple the DUT to ground, and at least two third probe pins configured to carry loopback test signals between contact regions on the DUT. A low dielectric constant (low-k) material may be located between the third probe pins and the guide plate. The low-k material may prevent direct contact between the third probe pins and the relatively higher dielectric-constant material of the guide plate, which may improve the signal integrity (SI) of the loopback test signals.

Abstract: The invention provides a method for producing a DNA template for mRNA containing a polyadenylate tail. This method is applicable to in vitro transcription reactions, generating mRNA with a specific polyadenylate tail length. Additionally, the invention further provides a method for extending the polyadenylate tail sequence using terminal deoxynucleotidyl transferase and combinations of restriction enzymes. This ensures that in in vitro transcription reactions, the mRNA can precisely terminate at the polyadenylate tail, thereby improving the accuracy and efficiency of mRNA synthesis.

Abstract: The disclosure relates to methods for determining an endometrial status using a sample, for example, a blood plasma sample, from a subject, comprising: (a) performing an assay on the blood sample from the subject to determine a miRNA expression profile, wherein the miRNA expression profile comprises expression levels of a plurality of miRNA and (b) analyzing the miRNA expression profile to obtain a predictive score using a computer-based machine-learning model.

Abstract: A smart space system includes: a cabin, including: a bottom surface; and a first screen, located on a side wall of the cabin and connected to the bottom surface; an interactive human-machine interface, including: a display system, having an imaging device, wherein the imaging device is configured to project multiple multimedia images onto the first screen; and a controller, signal-connected to the interactive human-machine interface to issue a control command to the interactive human-machine interface, so that the multimedia images are connected to form a first continuous image, so that images of the first continuous image appear coherent on the first screen.

Abstract: A method of screening weak bits in a memory array includes dividing the memory array into a first and a second memory array, storing a first set of data in the first memory array, performing a first baking process on the first memory array or applying a first magnetic field to the first memory array, determining that a first portion of the first set of data stored in the first memory array is altered by the first baking process or the first magnetic field, and at least one of replacing memory cells of a first set of memory cells that are storing the first portion of the first set of data with corresponding memory cells in the second memory array of the memory array, or not using the memory cells of the first set of memory cells storing the first portion of the first set of data.

Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.

Abstract: A method of screening weak bits in a memory array includes dividing the memory array into a first and a second memory array, storing a first set of data in the first memory array, performing a first baking process on the first memory array or applying a first magnetic field to the first memory array, determining that a first portion of the first set of data stored in the first memory array is altered by the first baking process or the first magnetic field, and at least one of replacing memory cells of a first set of memory cells that are storing the first portion of the first set of data with corresponding memory cells in the second memory array of the memory array, or not using the memory cells of the first set of memory cells storing the first portion of the first set of data.

Abstract: A method of screening weak bits in a memory array. The method includes storing a first set of data in a first memory array of the memory array, performing a first baking process on at least the first memory array or applying a first magnetic field to at least the first memory array, tracking an address of at least a first memory cell of a first set of memory cells of the first memory array, if the first memory cell of the first set of memory cells stores altered data, and at least one of replacing the first memory cell of the first set of memory cells storing the altered data with a corresponding memory cell in a second memory array of the memory array, or discarding the first memory cell of the first set of memory cells storing the altered data.

Abstract: There is provided a Bluetooth audio system including an audio source and an audio sink. The audio sink responds multiple codec types supported thereby in a protocol message exchange of a first mode, and responds a single codec type only supported thereby and a maximum transmission unit (MTU) size as 367 bytes in a protocol message exchange of a second mode. The audio source reduces a sampling number of the used codec to be lower than 1024 samples after receiving the single codec type and the MTU size of 367 bytes.

Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.

Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.

Abstract: A method of screening weak bits in a memory array. The method includes storing a first set of data in a first memory array of the memory array, performing a first baking process on at least the first memory array or applying a first magnetic field to at least the first memory array, tracking an address of at least a first memory cell of a first set of memory cells of the first memory array, if the first memory cell of the first set of memory cells stores altered data, and at least one of replacing the first memory cell of the first set of memory cells storing the altered data with a corresponding memory cell in a second memory array of the memory array, or discarding the first memory cell of the first set of memory cells storing the altered data.

Abstract: A failure mode detection method is provided. A first default read voltage is changed to a first read retry voltage by a first increment, and a second default read voltage is changed to a second read retry voltage by a second increment. A memory cell array of a solid state storage device is successfully read according to the first and second read retry voltages. If an absolute value of the first increment minus an absolute value of the second increment is larger than a predetermined voltage value, the memory cell array is in a data retention failure mode. If the absolute value of the first increment minus the absolute value of the second increment is smaller than the predetermined voltage value, the memory cell array is in a low temperature write high temperature read failure mode.

Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.

Abstract: A solid state storage device is in communication with a host. The solid state storage device includes a control circuit and a non-volatile memory. The control circuit is in communication with the host. The control circuit includes an error correction circuit and a prediction model storage circuit. A prediction model is stored in the prediction model storage circuit. The non-volatile memory includes a memory cell array. The memory cell array includes plural blocks. Each of the blocks includes a corresponding state parameter. The control circuit determines a selected block from the memory cell array. The control circuit judges whether to perform a specified operation on the selected block according to the state parameter of the selected block and the prediction model.

Abstract: A read table management method for a solid state storage device includes the following steps. If the lowest computation value in a hot group is lower than the highest computation value in a cold group when a read table adjusting process is enabled, a first read voltage set corresponding to the lowest computation value in the hot group and a second read voltage set corresponding to the highest computation value in the cold group are swapped with each other. Consequently, the second read voltage set becomes to belong to the hot group, and the first read voltage set becomes to belong to the cold group.

Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.