Abstract: In some embodiments, the present disclosure relates to an integrated device, including a substrate; an interconnect structure disposed over the substrate, the interconnect structure including an dielectric; a first bottom electrode structure disposed in the dielectric, the first bottom electrode structure having a first width as measured between outer sidewalls of the first bottom electrode structure and a first depth as measured from an upper surface of the dielectric; and a second bottom electrode structure disposed in the dielectric and spaced apart from the first bottom electrode structure, the second bottom electrode structure having a second width as measured between outer sidewalls of the second bottom electrode structure and a second depth as measured from the upper surface of the dielectric; where the first width is greater than the second width and the first depth is greater than the second depth.

Abstract: Various embodiments of the present disclosure are directed towards a metal-insulator-metal (MIM) device. The MIM device includes a first conductive layer disposed over a substrate, a first capacitor dielectric disposed over the first conductive layer, and a second conductive layer disposed over the first capacitor dielectric. The first conductive layer and the first capacitor dielectric laterally extend past an outermost sidewall of the second conductive layer. A second capacitor dielectric is disposed over the second conductive layer and the first capacitor dielectric, and a third conductive layer is disposed over the second capacitor dielectric. The third conductive layer laterally extends past the outermost sidewall of the second conductive layer. A conductive structure is coupled to both the first conductive layer and the third conductive layer. The conductive structure extends through the first capacitor dielectric and the second capacitor dielectric laterally outside of the second conductive layer.

Abstract: Some embodiments of the present disclosure relate to an integrated chip including an extended via that spans a combined height of a wire and a via and that has a smaller footprint than the wire. The extended via may replace a wire and an adjoining via at locations where the sizing and the spacing of the wire are reaching lower limits. Because the extended via has a smaller footprint than the wire, replacing the wire and the adjoining via with the extended via relaxes spacing and allows the size of the pixel to be further reduced. The extended via finds application for capacitor arrays used for pixel circuits.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device includes at least three metal plates that are spaced from one another. The MIM device further includes a plurality of capacitor insulator structures. Each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device comprises at least three metal plates that are spaced from one another. The MIM device further comprises a plurality of capacitor insulator structures, where each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.

Abstract: Capacitors and interconnect structures that couple transistors to one another include parallel stacked metal lines separated by dielectric layers. When capacitors and interconnect structures are combined, each top metal capacitor plate can be coupled to the nearest upper metal line by a through-via, while each bottom metal capacitor plate can be coupled directly to the nearest lower metal line without a via. When a back end of line (BEOL) cell includes multiple capacitors, and design rules require shrinking the cell dimensions, substituting an alternative design that has fewer through-vias can facilitate compaction of the BEOL cell. Similarly, placing capacitors in close proximity so that they can share through-vias can allow even further compaction.

Abstract: An optical device with isolation structures and a method of fabricating the same are disclosed. The optical device includes a substrate having a first surface and a second surface opposite to the first surface, first and second radiation sensing devices disposed in the substrate, a first isolation structure disposed in the substrate. The first isolation structure has a first surface and a second surface opposite to the first surface. The optical device further includes a second isolation structure disposed in the substrate and on the first surface of the first isolation structure. The second isolation structure includes a metal structure and a dielectric layer surrounding the metal structure. The second isolation structure vertically extends over the first surface of the substrate.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device comprises at least three metal plates that are spaced from one another. The MIM device further comprises a plurality of capacitor insulator structures, where each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.

Abstract: Examples pertaining to informing an upper layer for originating a mobile originated multimedia telephony (MO-MMTEL) video call during network congestion in mobile communications are described. An apparatus (e.g., UE) identifies a need to initiate an MO-MMTEL video call over a first domain. The UE then determines that there is a condition related to initiating the MO-MMTEL video call over the first domain. In response to the determining, the UE initiates the MO-MMTEL video call over a second domain different than the first domain.

Abstract: A method of enhancing the accuracy to predict the gender of a network user comprises: obtaining campaign gender distribution ratios for each advertising campaign by counting the gender information of groundtruth devices which clicked in the respective advertising campaigns; assigning the gender information for each unknown device by finding out the advertising campaigns that are clicked by the unknown device, multiplying the campaign gender distribution ratios of the clicked advertising campaigns, and comparing the multiplied result with a first certain value; obtaining update campaign gender distribution ratios for each advertising campaign by counting the gender information of groundtruth devices and unknown devices which clicked in the respective advertising campaigns; and comparing a quadratic sum of the difference of the old and update campaign gender distribution ratios with a second certain value for each advertising campaign, and back to the assigning step if the quadratic sum is greater than a second