Abstract: An oscillator is provided. The oscillator comprises a flip-flop module, a first and a second setting module. The first setting module comprises: a first switch device to generates a first switch signal according to a first oscillating signal, an NMOS and an inverter. The NMOS comprises a drain to receive a first charging current and a gate to receive the first switch signal, wherein the drain is charged or discharged according to the first switch signal. The inverter is connected to the drain to generate a first setting signal. The second setting module comprises a second switch device to generate a second switch signal according to a second oscillating signal and a comparator to generate a second setting signal according to the second switch signal and a reference voltage. The flip-flop module generates the first and the second oscillating signal according to the first and the second setting signal.

Abstract: A voltage converting circuit for converting an input voltage into an output voltage is disclosed. The voltage converting circuit includes a modulation signal generator, a comparator and a logic unit. The modulation signal generator is configured for generating a pulse width modulation (PWM) signal responsive to a feedback signal corresponding to the output voltage and a load coupled thereto. The comparator is configured for comparing the feedback signal with a reference signal to output a comparing signal. The logic unit is configured for performing a logical conjunction of the PWM signal and the comparing signal to generate a control signal for adjusting an input current corresponding to the input voltage to regulate the output voltage. A method for converting an input voltage into an output voltage is also disclosed herein.

Abstract: An oscillator is provided. The oscillator comprises a flip-flop module, a first and a second setting module. The first setting module comprises: a first switch device to generates a first switch signal according to a first oscillating signal, an NMOS and an inverter. The NMOS comprises a drain to receive a first charging current and a gate to receive the first switch signal, wherein the drain is charged or discharged according to the first switch signal. The inverter is connected to the drain to generate a first setting signal. The second setting module comprises a second switch device to generate a second switch signal according to a second oscillating signal and a comparator to generate a second setting signal according to the second switch signal and a reference voltage. The flip-flop module generates the first and the second oscillating signal according to the first and the second setting signal.

Abstract: A switching circuit adapted in an LED circuit and an LED circuit are provided. The switching circuit has a mode-selecting circuit, a comparator and a control module. The mode-selecting circuit has a voltage-dividing module and a switch. The voltage-dividing module receives and divides a reference voltage to further generate a working voltage. The switch is connected to the voltage-dividing module, wherein the switch has an output. The comparator comprises a first input connected to the switch, a second input and a comparator output. During a measuring mode, the switch transfers the reference voltage and the second input is connected to the comparator output. During a working mode, the switch transfers the working voltage, the second input of the comparator receives an output voltage of the LED circuit and the control module generates a control signal according to the voltage of the comparator output to switch the LED circuit.

Abstract: A voltage trimming circuit is provided. The voltage trimming circuit has an input stage, an up-trimming resistor ladder, a down-trimming resistor ladder and a control means. The input stage has a first input, a second input and an output, wherein the first output is to receive an input voltage, the second input is connected to a connection point and the output is to provide an output voltage based on a difference between the voltage of the first and the second input. The up-trimming resistor ladder is connected between the output of the input stage and the connection point and the down-trimming resistor ladder connected between a ground potential and the connection point. The control means controls the resistance of the up-trimming and the down-trimming resistor ladder to up-trim or down-trim the output voltage.

Abstract: A voltage trimming circuit is provided. The voltage trimming circuit has an input stage, an up-trimming resistor ladder, a down-trimming resistor ladder and a control means. The input stage has a first input, a second input and an output, wherein the first output is to receive an input voltage, the second input is connected to a connection point and the output is to provide an output voltage based on a difference between the voltage of the first and the second input. The up-trimming resistor ladder is connected between the output of the input stage and the connection point and the down-trimming resistor ladder connected between a ground potential and the connection point. The control means controls the resistance of the up-trimming and the down-trimming resistor ladder to up-trim or down-trim the output voltage.

Abstract: An over-current protection circuit includes a voltage generating unit and a comparing unit. The voltage generating unit is configured for receiving a first voltage and generating a reference voltage. The reference voltage has an offset positively dependent on temperature and negatively dependent on the first voltage, and the offset of the reference voltage varies along with another offset varying within a sense voltage sensed by the over-current protection circuit. The comparing unit is configured for comparing the reference voltage with the sense voltage to output a control signal for de-asserting the sense voltage when the sense voltage is correlated to an over-current condition of the sense voltage exceeding the reference voltage. A driver is also disclosed herein.

Abstract: A current regulating circuit includes a transistor and an operational amplifier. The transistor receives a load current and generates a feedback voltage corresponding to the load current. The operational amplifier receives a reference voltage and the feedback voltage to control the transistor. The operational amplifier further includes an input stage and an output stage. The input stage includes amplifier inputs each for alternately receiving the reference voltage and the feedback voltage so that the input stage generates operating voltages corresponding to the reference voltage and the feedback voltage. The output stage receives the operating voltages alternately to control the transistor. A driver and a method of current regulation are also disclosed herein.

Abstract: An operational amplifier includes an output unit, a voltage drop element and a feedback unit. The output unit is provided for sourcing an output current to an output of the operational amplifier when operating with a power unit for providing a current being multiple times the value of the output current. The voltage drop is provided for generating a voltage drop in accordance with the output current. The feedback unit is controlled with the voltage drop generated by the voltage drop element and controls the output unit and the power unit to regulate the output current in accordance with the voltage drop.

Abstract: An LED driving circuit includes a control logic circuit, a dimming circuit and a counter. The control logic circuit is electrically coupled to an enable pin for receiving an input signal, and asserts an internal enable signal for activating the LED driving circuit. The dimming circuit is electrically coupled to the enable pin and outputs a control signal for controlling current flowing into at least one load connected to the LED driving circuit. The counter identifies the input signal based on a clock signal and asserts a detection signal for informing the control logic circuit of de-asserting the internal enable signal to de-activate lo the LED driving circuit when identifying the input signal as the enable signal being de-asserted for a predetermined period of the clock signal. A method of controlling an LED driving circuit is also disclosed herein.

Abstract: A LED circuit is provided. The LED circuit comprises: an inductor, a group of LEDs, a power MOS and a switching circuit. The switching circuit comprises: an error amplifier generating an error output, a PWM, a RC circuit and a control means. The PWM generates a switching signal according to the error output to control the power MOS to charge or discharge the group of LEDs; the RC circuit comprises at least one first capacitor each comprising a switch, at least one second capacitors; and a resistive means connected in series between the first and the second capacitors and the error output. The control means generates a control signal according to the dimming signal to turn on the switches to activate the first capacitors during the active period of the dimming signal and turn off the switches to deactivate the first capacitors during the inactive period of the dimming signal.

Abstract: An operational amplifier includes an output unit, a voltage drop element and a feedback unit. The output unit is provided for sourcing an output current to an output of the operational amplifier when operating with a power unit for providing a current being multiple times the value of the output current. The voltage drop is provided for generating a voltage drop in accordance with the output current. The feedback unit is controlled with the voltage drop generated by the voltage drop element and controls the output unit and the power unit to regulate the output current in accordance with the voltage drop.

Abstract: A low drop out linear regulator is provided. The low drop out linear regulator comprises an output PMOS, a load, a discharging circuit and an operational amplifier. The output PMOS comprises a source connected to a power supply and a drain having an output voltage and an output current. The drain is connected to a load circuit having a heavy and a light load period. The load is connected to the drain to generate a divided output voltage. The discharging circuit is connected to the drain to discharge the output current from the drain. The operational amplifier is to generate a control voltage according to the divided output voltage and a reference voltage; when the load circuit switches from the heavy to the light load period to make the divided output voltage higher than the reference voltage, the control voltage turns off the output PMOS and activates the discharging circuit.

Abstract: An audio power amplifier includes a pre-amplifier, an error amplifier, a comparator, a bridge circuit, and a feedback circuit, in which the gain of the pre-amplifier gradually increases when the audio power amplifier is powered on. The comparator generates a PWM signal by comparing a reference signal and an amplified audio signal. The bridge circuit has switches controlled according to the PWM signal such that a driving current alternately flows to and from a load. The feedback circuit generates the feedback signal indicating a condition of the load.

Abstract: An audio power amplifier includes a pre-amplifier, an error amplifier, a comparator, a bridge circuit, and a feedback circuit, in which the gain of the pre-amplifier gradually increases when the audio power amplifier is powered on. The comparator generates a PWM signal by comparing a reference signal and an amplified audio signal. The bridge circuit has switches controlled according to the PWM signal such that a driving current alternately flows to and from a load. The feedback circuit generates the feedback signal indicating a condition of the load.

Abstract: A class D audio amplifier includes an error amplifier, a comparator, a bridge circuit, a feedback circuit and a silent start circuit. The error amplifier generates an error signal by amplifying a difference between a feedback signal and an audio input signal. The comparator generates a first pulse width modulation (PWM) signal by comparing a first triangular-wave signal and the error signal. The bridge circuit has switches alternately conducting a current flowing into and from a load. The feedback circuit generates the feedback signal indicating a condition of the load. The silent start circuit performs AND operation of the first PWM signal and a second PWM signal having a gradually increased duty ratio to generate a third PWM signal for control of the switches of the bridge circuit.

Abstract: A driving circuit to drive an output stage comprising a high side NMOS and a low side NMOS is provided. The driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source and the sources of a first and a second PMOS; a third and a fourth PMOS both comprising a drain, a source and a gate, wherein the sources are respectively connected to the gates of the second and first PMOS, the drains are respectively connected to the drains of the first and second PMOS. A first and a second NMOS both comprise a drain, a source and a gate, wherein the drains are respectively connected to the drain of the fourth and third PMOS, the sources are coupled to a second voltage source, the gates are respectively connected to a first input and a second input.

Abstract: A driving circuit to drive an output stage comprising a high side NMOS and a low side NMOS is provided. The driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source and the sources of a first and a second PMOS; a third and a fourth PMOS both comprising a drain, a source and a gate, wherein the sources are respectively connected to the gates of the second and first PMOS, the drains are respectively connected to the drains of the first and second PMOS. A first and a second NMOS both comprise a drain, a source and a gate, wherein the drains are respectively connected to the drain of the fourth and third PMOS, the sources are coupled to a second voltage source, the gates are respectively connected to a first input and a second input.

Abstract: A class D audio amplifier includes an error amplifier, a comparator, a bridge circuit, a feedback circuit and a silent start circuit. The error amplifier generates an error signal by amplifying a difference between a feedback signal and an audio input signal. The comparator generates a first pulse width modulation (PWM) signal by comparing a first triangular-wave signal and the error signal. The bridge circuit has switches alternately conducting a current flowing into and from a load. The feedback circuit generates the feedback signal indicating a condition of the load. The silent start circuit performs AND operation of the first PWM signal and a second PWM signal having a gradually increased duty ratio to generate a third PWM signal for control of the switches of the bridge circuit.

Abstract: An audio power amplifier includes a pre-amplifier, an error amplifier, a comparator, a bridge circuit, and a feedback circuit, in which the gain of the pre-amplifier gradually increases when the audio power amplifier is powered on. The comparator generates a PWM signal by comparing a reference signal and an amplified audio signal. The bridge circuit has switches controlled according to the PWM signal such that a driving current alternately flows to and from a load. The feedback circuit generates the feedback signal indicating a condition of the load.