Patents by Inventor KUAN-LIANG LU

KUAN-LIANG LU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10410892
    Abstract: A method of semiconductor wafer bonding and system thereof are proposed. A first alignment mark of a first semiconductor wafer is aligned with a second alignment mark of a second semiconductor wafer. A partial attachment is performed between the first semiconductor wafer and the second semiconductor wafer. A scanning is performed along a direction substantially parallel to a surface of the first semiconductor wafer. It is determined if a bonding defect of the partially attached first semiconductor wafer and the second semiconductor wafer exists.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: September 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Liang Lu, Xin-Hua Huang, Yeur-Luen Tu
  • Publication number: 20180144999
    Abstract: A method of semiconductor wafer bonding and system thereof are proposed. A first alignment mark of a first semiconductor wafer is aligned with a second alignment mark of a second semiconductor wafer. A partial attachment is performed between the first semiconductor wafer and the second semiconductor wafer. A scanning is performed along a direction substantially parallel to a surface of the first semiconductor wafer. It is determined if a bonding defect of the partially attached first semiconductor wafer and the second semiconductor wafer exists.
    Type: Application
    Filed: November 18, 2016
    Publication date: May 24, 2018
    Inventors: KUAN-LIANG LU, XIN-HUA HUANG, YEUR-LUEN TU