Patents by Inventor Kuan LIU

Kuan LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170473
    Abstract: A chip package structure including a heat dissipation base, a first redistribution layer, a second redistribution layer, at least one chip, at least one metal stack, a plurality of conductive structures, and an encapsulant is provided. The second redistribution layer is disposed on the heat dissipation base and thermally coupled to the heat dissipation base. The chip, the metal stack, and the conductive structures are disposed between the second redistribution layer and the first redistribution layer. An active surface of the chip is electrically connected to the first redistribution layer and an inactive surface of the chip is thermally coupled to the second redistribution layer via the metal stack. The first redistribution layer is electrically connected to the second redistribution layer via the conductive structures. The encapsulant is filled between the second redistribution layer and the first redistribution layer. A manufacturing method of a chip package structure is also provided.
    Type: Application
    Filed: July 6, 2023
    Publication date: May 23, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hao-Che Kao, Wen-Hung Liu, Yu-Min Lin, Ching-Kuan Lee
  • Publication number: 20240169533
    Abstract: A method for calculating parameters in a larynx image with an artificial intelligence assistance includes training a deep learning object detection software and a deep learning image recognition and segmentation software to extract a glottis image from a larynx image and recognize a membranous glottal gap; after receiving a larynx image, a plurality of larynx images captured frame-by-frame, or a larynx video that is captured when vocal folds are in a phonating state, extracting a glottis image by the deep learning object detection software; recognizing a membranous glottal gap in the glottis image and correspondingly outputting a membranous glottal gap filter by the deep learning image recognition and segmentation software; performing image processing of edge detection and image patching on the membranous glottal gap filter to clearly outline the membranous glottal gap and obtaining a medical parameter of several vocal fold anatomies from the clearly outlined membranous glottal gap.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Applicant: Changhua Christian Medical Foundation Changhua Christian Hospital
    Inventors: ANDY CHEN, ACQUAH HACKMAN, MU-KUAN CHEN, CHIH-CHIN LIU
  • Patent number: 11984451
    Abstract: A display device having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. The first active layer is a different material than the second active layer, and a hydrogen concentration of the second gate insulator is less than a hydrogen concentration of the first gate insulator.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: May 14, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Kuan-feng Lee, Chandra Lius, Nai-Fang Hsu
  • Publication number: 20240153895
    Abstract: Semiconductor dies of a semiconductor die package are directly bonded, and a top metal region may be formed over the semiconductor dies. A plurality of conductive terminals may be formed over the top metal region. The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal. In this way, the conductive terminals of the semiconductor die packages described herein may be formed at a relatively low temperature. This reduces the likelihood of thermal deformation of semiconductor dies in the semiconductor die packages. The reduced thermal deformation reduces the likelihood of warpage, breakage, and/or other types of damage to the semiconductor dies of the semiconductor die packages, which may increase performance and/or increase yield of semiconductor die packages.
    Type: Application
    Filed: April 19, 2023
    Publication date: May 9, 2024
    Inventors: Harry-HakLay CHUANG, Wei-Cheng WU, Chung-Jen HUANG, Yung Chun TU, Chien Lin LIU, Shun-Kuan LIN, Ping-tzu CHEN
  • Patent number: 11972571
    Abstract: The method for image segmentation includes: acquiring, according to an image to be segmented including a background, a mediastinum, an artery and a vein, a first segmentation result of the mediastinum, the artery, the vein and the background in a mediastinum region of the image to be segmented; acquiring, according to the image to be segmented, a second segmentation result of a blood vessel and the background in an epitaxial region of the image to be segmented; and acquiring, according to the first segmentation result and the second segmentation result, a segmentation result of the mediastinum, the artery, the vein and the background of the image to be segmented, so that the segmentation accuracy and the segmentation efficiency of the artery and the vein may be improved.
    Type: Grant
    Filed: October 10, 2021
    Date of Patent: April 30, 2024
    Assignee: Infervision Medical Technology Co., Ltd.
    Inventors: Enyou Liu, Shaokang Wang, Kuan Chen
  • Patent number: 11966381
    Abstract: Embodiments maintain a data pool that includes heterogeneous data sets, and receiving a first data batch of a data set from a data source into the data pool. Embodiments determine a current state of the data set based on a data set state diagram including a plurality of data set states, and identify a condition of the first data batch. Embodiments further set a data batch state for the first data batch, based on a data batch state diagram, and update the data batch state of a prior data batch received before the first data batch, based on the condition of the first data batch. Embodiments additionally transition the data set state diagram, based on the condition of the first data batch, to an updated data set state. Embodiments maintain a data state repository storing the data set state for each of the plurality of heterogeneous data sets.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 23, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Liangzhao Zeng, Ting Yu Cliff Leung, Yat On Lau, Jimmy Hong, Chuang Yao, Yen-Ting Liu, Ting-Kuan Wu
  • Publication number: 20240128093
    Abstract: A manufacturing method of an electronic device includes that a chip package is mounted on a circuit board. And an exposed surface of the chip package is bombarded with plasma to clean the surface. The manufacturing method of the electronic device of the application can effectively clean the chip package without reducing the reliability of the electronic device.
    Type: Application
    Filed: December 2, 2022
    Publication date: April 18, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Xu Wang, Chih-Kuan Liu
  • Publication number: 20240120326
    Abstract: Disclosed is a bio sensing device including a medium layer, a light emitting element and an optical sensor. The light emitting element is configured to emit a light toward a user's skin layer, in which the light passes through the medium layer and has a maximum intensity in a first wavelength. The optical sensor is configured to receive a reflected part of the light from the user's skin layer, in which the reflected part of the light passes through the medium layer, and the medium layer has a first transmittance greater than 60% with respect to the first wavelength.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 11, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Chandra LIUS, Tsung-Han TSAI, Kuan-Feng LEE
  • Publication number: 20240122010
    Abstract: Disclosed is a display device including a substrate, a first light-emitting element, a first pixel circuit, a second light-emitting element, a second pixel circuit, and a first scan line. The substrate includes a functional display region and a first display region adjacent to the functional display region in a first direction. The first light-emitting element is disposed on the functional display region. The first pixel circuit is disposed on the first display region and is electrically connected to the first light-emitting element. The second light-emitting element is disposed on the first display region. The second pixel circuit is disposed on the first display region and is electrically connected to the second light-emitting element. The first scan line is electrically connected to the first pixel circuit and the second pixel circuit and extends in a second direction perpendicular to the first direction. An electronic device is also disclosed.
    Type: Application
    Filed: September 7, 2023
    Publication date: April 11, 2024
    Applicant: Innolux Corporation
    Inventors: Chandra Lius, Kuan-Feng Lee
  • Publication number: 20240105659
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over a semiconductor die. A portion of the RDL contacts a die pad of the semiconductor die. A metal layer is formed on a top surface and sidewalls of the RDL and configured to encase the RDL. A non-conductive layer is formed over the metal layer and underlying RDL. An opening in the non-conductive layer is formed exposing a portion of the metal layer formed on the RDL. An under-bump metallization (UBM) is formed in the opening and conductively connected to the die pad by way of the metal layer and RDL.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Kuan-Hsiang Mao, Yufu Liu, Wen Hung Huang, Tsung Nan Lo
  • Publication number: 20240096255
    Abstract: Disclosed is a display device including a controlling unit, a display driver electrically connected to the controlling unit, a sensor driver electrically connected to the controlling unit, a display element electrically connected to the display driver, and a sensor element electrically connected to the sensor driver. The display element comprises a first group of sub-pixels having a same color. The sensor element is sensing a biometric feature in a sensing time period, and the sensing time period comprises 3 to 120 frame times. All the first group of sub-pixels are turned on one time in each of the 3 to 120 frame times by the display driver.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicant: InnoLux Corporation
    Inventors: CHANDRA LIUS, Kuan-Feng Lee
  • Patent number: 11935753
    Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: March 19, 2024
    Assignee: NXP B.V
    Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
  • Publication number: 20240078837
    Abstract: An electronic device includes a substrate, a sensing layer disposed on the substrate, an optical layer disposed on the sensing layer, and a cover layer disposed on the optical layer. The cover layer includes a first layer, a second layer disposed on the first layer, a third layer under the first layer, and a fourth layer between the first layer and the third layer. The fourth layer is an inorganic material layer and has a thickness ranged from 20 ?m to 60 ?m.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: InnoLux Corporation
    Inventors: Chandra LIUS, Kuan-Feng Lee
  • Patent number: 11044806
    Abstract: A multi-layer circuit structure is disposed on the delivery loading plate through the bottom-layer circuit structure, the delivery loading plate exposes the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: June 22, 2021
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Chin-Kuan Liu, Chao-Lung Wang, Shuo-Hsun Chang, Yu-Te Lu, Chin-Hsi Chang
  • Patent number: 10691804
    Abstract: A password power switch circuit for an electronic device includes a thermal energy conversion circuit and a programmable control chip. The thermal energy conversion circuit is used for generating a plurality of sensing temperatures. The programmable control chip is coupled to the thermal energy conversion circuit for storing a password and generating a power-on signal to a central processing device of the electronic device according to a plurality of locations corresponding to the plurality of sensing temperatures and a plurality of locations corresponding to the password. The central processing device determines at least one operation associated with the electronic device according to the power-on signal.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: June 23, 2020
    Assignee: Wistron Corporation
    Inventors: Chen-Yi Liang, Chun-Kuan Liu
  • Patent number: 10651679
    Abstract: This invention provides a wireless input device, including a primary battery set, a backup battery, an electricity generating device, an energy-storage/charging device, and a switching device. The primary battery set provides electricity to the wireless input device. The backup battery provides electricity to the wireless input device when the primary battery set does not have sufficient electricity. The electricity generating device generates electricity in response to clicking/pressing operations to the wireless input device. The energy-storage/charging device is coupled to the backup battery and the electricity generating device. The energy-storage/charging device stores the electricity generated by the electricity generating device and charges the backup battery when the stored electricity has reached a predetermined volume. The switching device is coupled to the primary battery set and the backup battery.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: May 12, 2020
    Assignee: WISTRON CORP.
    Inventors: Chen-Yi Liang, Chun-Kuan Liu
  • Publication number: 20200128662
    Abstract: A manufacturing method for a multi-layer circuit board capable of being applied with electrical testing is provided. According to the multi-layer circuit board manufactured by the method, the multi-layer circuit structure is disposed on the delivery loading plate through the bottom-layer circuit structure, the delivery loading plate exposes the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.
    Type: Application
    Filed: December 17, 2019
    Publication date: April 23, 2020
    Inventors: Chin-Kuan Liu, Chao-Lung Wang, Shuo-Hsun Chang, Yu-Te Lu, Chin-Hsi Chang
  • Patent number: 10548214
    Abstract: A multi-layer circuit board capable of being applied with electrical testing includes a metallic delivery loading plate, a bottom-layer circuit structure, a conductive corrosion-barrier layer, and a multi-layer circuit structure. The bottom-layer circuit structure is overlapping on the delivery loading plate. The conductive corrosion-barrier layer is disposed on the bottom dielectric layer. The multi-layer circuit structure is overlapping on the bottom-layer circuit structure. The top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the inner-layer circuit of the multi-layer circuit structure and the bottom-layer circuit of the bottom-layer circuit structure. The delivery loading plate and the bottom dielectric layer of the bottom-layer circuit structure expose the conductive corrosion-barrier layer.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: January 28, 2020
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Chin-Kuan Liu, Chao-Lung Wang, Shuo-Hsun Chang, Yu-Te Lu, Chin-Hsi Chang
  • Patent number: 10455694
    Abstract: A manufacturing method for a multi-layer circuit board is provided. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer, the delivery loading plate and the patterned metal interface layer expose the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: October 22, 2019
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Chin-Kuan Liu, Chao-Lung Wang, Shuo-Hsun Chang, Yu-Te Lu, Chin-Hsi Chang
  • Patent number: 10432775
    Abstract: An emergency call circuit for an electronic device includes a dial button, a wireless communication module, an emergency call button and a logic circuit. The wireless communication module is used for dialing an emergency call according to a dial signal generated by the dial button when the wireless communication device is shut down. The logic circuit is used for transmitting an emergency call detecting signal generated by the emergency call button to the wireless communication module and a power circuit of the electronic device, wherein the power circuit supplies a first power source to the logic circuit and the wireless communication module when the electronic device is shut down.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: October 1, 2019
    Assignee: Wistron Corporation
    Inventors: Chen-Yi Liang, Chun-Kuan Liu