Abstract: The present invention relates generally to the field of allergies. More particularly, the present invention provides a method for treating an allergy in a subject by inducing tolerance to an allergen associated with the allergy. Medicinal kits useful in protocols to induce tolerance or reduce intolerance in a subject also form part of the present invention.

Abstract: The present invention relates generally to the field of allergies. More particularly, the present invention provides a method for treating an allergy in a subject by inducing tolerance to an allergen associated with the allergy. Medicinal kits useful in protocols to induce tolerance or reduce intolerance in a subject also form part of the present invention.

Abstract: The LED display system comprises an array of LEDs and a driver circuit that employs a scrambled PWM generator. The scrambled PWM generator is configured to generate a plurality of PWM pulses. The PWM pulses are distributed into a corresponding number of refresh segments. The driver circuit is configured so that one or more of PWM pulses are extendable by a certain offset value so that the pulse width in the corresponding refresh segments is wide enough for the LED to emit light.

Abstract: The apparatus for driving LED display includes a system control unit having a synchronization signal generator configured to generate a synchronization start signal and a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider coupled to the voltage controlled oscillator and configured to change the sequence of dividing ratios over a modulation period, a sigma delta modulator configured to generate a sequence of random numbers to the divider, and a spread spectrum modulation depth controller coupled to the sigma delta modulator and configured to receive the synchronization start signal from the synchronization signal generator. Upon receipt of the synchronization start signal, the spread spectrum modulation depth controller starts a spread spectrum modulation.

Abstract: An apparatus for driving LED display includes a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider configured to receive the voltage controlled output signal and generate the feedback signal, a memory configured to generate a modulation profile codes and a sigma delta block. The divider receives a randomized numbers so as to change a dividing ratio over a modulation period. The sigma delta block includes at least one sigma delta modulator and at least one gain block. The sigma delta block is configured to receive the modulation profile codes and generate the randomized numbers to the divider. Each of the at least one gain block is configured to generate a value that is multiplied to at least one of the at least one sigma delta modulator so as to change a spread spectrum modulation depth.

Abstract: The current disclosure provides an LED display control circuit. The control circuit has a device configured to separate a first PWM data into LSB data and MSB data. The control circuit also comprises a LSB circuit coupled to a plurality of LED channels. The LSB circuit is configured to supply LSB data to each of the plurality of LED channels.

Abstract: The LED display system comprises an array of LEDs and a driver circuit that employs a scrambled PWM generator. The scrambled PWM generator is configured to generate a plurality of PWM pulses. The PWM pulses are distributed into a corresponding number of refresh segments. The driver circuit is configured so that one or more of PWM pulses are extendable by a certain offset value so that the pulse width in the corresponding refresh segments is wide enough for the LED to emit light.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: This disclosure provides an output stage for a LED driver circuit. The output stage has an input module, a regulator module for maintaining a constant internal voltage, and an output module for generating output signals.

Abstract: The present disclosure provides a circuit for discharging parasitic capacitance in a display panel with common-anode topology having a plurality of light emitters, as well as a circuit for charging parasitic capacitance in a display panel with common-cathode topology. In the common-cathode topology, the circuit includes a three-terminal device having a gate, a source, and a drain, wherein one of the source and the drain is electrically coupled to a common cathode of the light emitters, and a mechanism for controlling the three-terminal device, the mechanism being electrically coupled to the gate. Shortly after a previously selected light emitter is unselected, the mechanism turns on the three-terminal device to form a conductive path between the source and the drain. The mechanism turns off the three-terminal device after a voltage at the common cathode is increased to a predetermined voltage level or after a maximum period of time lapses.

Abstract: This disclosure provides an output stage for a LED driver circuit. The output stage has an input module, a regulator module for maintaining a constant internal voltage, and an output module for generating output signals.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: The apparatus for driving LED display includes a system control unit having a synchronization signal generator configured to generate a synchronization start signal and a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider coupled to the voltage controlled oscillator and configured to change the sequence of dividing ratios over a modulation period, a sigma delta modulator configured to generate a sequence of random numbers to the divider, and a spread spectrum modulation depth controller coupled to the sigma delta modulator and configured to receive the synchronization start signal from the synchronization signal generator. Upon receipt of the synchronization start signal, the spread spectrum modulation depth controller starts a spread spectrum modulation.

Abstract: An apparatus for driving LED display includes a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider configured to receive the voltage controlled output signal and generate the feedback signal, a memory configured to generate a modulation profile codes and a sigma delta block. The divider receives a randomized numbers so as to change a dividing ratio over a modulation period. The sigma delta block includes at least one sigma delta modulator and at least one gain block. The sigma delta block is configured to receive the modulation profile codes and generate the randomized numbers to the divider. Each of the at least one gain block is configured to generate a value that is multiplied to at least one of the at least one sigma delta modulator so as to change a spread spectrum modulation depth.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a gain adjustable fast charge current source, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: An optical transceiver module adapted to a link device includes a connection unit, a driving unit and optical transmitting and receiving units. The connection unit, to be coupled with the link device, includes an indicating element for generating an indicating signal when the connection unit is coupled with the link device. The driving unit, coupled with the connection unit, receives the indicating signal and outputs a control signal according to the indicating signal. The optical transmitting unit, coupled with the driving unit, receives the control signal for driving the optical transmitting unit to output a first optical signal. The optical receiving unit, coupled with the driving unit, transmits a received second optical signal to the driving unit. An optical transmission device using the optical transceiver module, and an optical transmission method are also disclosed. A link training sequence can be initiated after the connection unit is actually coupled with the link device.

Abstract: The present disclosure provides devices, circuits, and methods for driving an LED display panel, so as to ensure the delivery of equal global charge at minimum gray scale. In one example, the circuit of the present disclosure includes a current source, a detection module, and a measurement module. The current source is configured to generate a current signal for the LEDs. The detection module is configured to detect a forward voltage of the LEDs in response to a low current applied to the LEDs. The detection module is further configured to hold the detected forward voltage. The measurement module is configured to measure a time period for an anode voltage of the LEDs to rise to the detected forward voltage in response to a display current applied to the LEDs.

Abstract: An improved transmission protocol is used to transmit a signal between two components of an electronic device. The improved transmission protocol is configured to reduce the number of simultaneous channel transitions that occur when multiple signal channels are transmitted in parallel. Reducing the number of simultaneous channel transitions is beneficial because a signal that is subject to skew, distortion, or electromagnetic interference during transmission may have a shorter settling time when fewer channels undergo a transition simultaneously. When the protocol is used to transmit a signal from a controller to an optical pickup unit in an optical data storage system, the reduced settling times allow for a higher data transmission rate.

Abstract: The present disclosure provides a circuit for discharging parasitic capacitance in a display panel with common-anode topology having a plurality of light emitters, as well as a circuit for charging parasitic capacitance in a display panel with common-cathode topology. In the common-cathode topology, the circuit includes a three-terminal device having a gate, a source, and a drain, wherein one of the source and the drain is electrically coupled to a common cathode of the light emitters, and a mechanism for controlling the three-terminal device, the mechanism being electrically coupled to the gate. Shortly after a previously selected light emitter is unselected, the mechanism turns on the three-terminal device to form a conductive path between the source and the drain. The mechanism turns off the three-terminal device after a voltage at the common cathode is increased to a predetermined voltage level or after a maximum period of time lapses.