Abstract: The present disclosure relates to a hybrid integrated circuit. In one implementation, an integrated circuit may have a first region with a first gate structure having a ferroelectric gate dielectric, at least one source associated with the first gate of the first region, and at least one drain associated with the first gate structure of the first region. Moreover, the integrated circuit may have a second region with a second gate structure having a high-? gate dielectric, at least one source associated with the second gate structure of the second region, and at least one drain associated with the second gate structure of the second region. The integrated circuit may further have at least one trench isolation between the first region and the second region.

Abstract: A first fin structure is disposed over a substrate. The first fin structure contains a semiconductor material. A gate dielectric layer is disposed over upper and side surfaces of the first fin structure. A gate electrode layer is formed over the gate dielectric layer. A second fin structure is disposed over the substrate. The second fin structure is physically separated from the first fin structure and contains a ferroelectric material. The second fin structure is electrically coupled to the gate electrode layer.

Abstract: A device incudes a substrate. A first fin and a second fin are over the substrate. An isolation structure is laterally between the first fin and the second fin. A gate structure crosses the first fin and the second fin. A first source/drain epitaxy structure is over the first fin. A second source/drain epitaxy structure is over the second fin. A spacer layer extends from a first sidewall of the first fin to a first sidewall of the second fin along a top surface of the isolation structure.

Abstract: The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. The method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.

Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes channel members disposed over a substrate, a gate structure engaging the channel members, and an epitaxial feature adjacent the channel members. At least one of the channel members has an end portion in physical contact with an outer portion of the epitaxial feature. The end portion of the at least one of the channel members includes a first dopant of a first concentration. The outer portion of the epitaxial feature includes a second dopant of a second concentration. The first concentration is higher than the second concentration.

Abstract: The present disclosure is directed to methods for the formation of high-voltage nano-sheet transistors and low-voltage gate-all-around transistors on a common substrate. The method includes forming a fin structure with first and second nano-sheet layers on the substrate. The method also includes forming a gate structure having a first dielectric and a first gate electrode on the fin structure and removing portions of the fin structure not covered by the gate structure. The method further includes partially etching exposed surfaces of the first nano-sheet layers to form recessed portions of the first nano-sheet layers in the fin structure and forming a spacer structure on the recessed portions. In addition, the method includes replacing the first gate electrode with a second dielectric and a second gate electrode, and forming an epitaxial structure abutting the fin structure.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench, depositing a first ferroelectric layer over the interfacial layer, removing the first ferroelectric layer from the nFET structure, depositing a metal oxide layer in each gate trench, depositing a second ferroelectric layer over the metal oxide layer, removing the second ferroelectric layer from the pFET structure, and depositing a gate electrode in each gate trench.

Abstract: A method and an integrated routing device for controlling remote systems via short messages are provided. When a mobile communication device controls remote systems via short messages, the method and the integrated routing device verify whether the mobile communication device is a legal commander. When the mobile communication device is verified as a legal commander, the method and the integrated routing device generate a verification code and subtract consumed time caused by message relay from a first control duration to generate a second control duration. The mobile communication device performs remote control during the second control duration. By completing above procedure, the method and the integrated routing device are capable of preventing fatal damages resulted from missing the right timing for executing control commands, and can further improve the efficiency of controlling remote systems via short messages.

Abstract: An active monitoring system for serial monitoring devices and the method thereof are provided. By receiving serial data from a serial monitoring device on a triggering device and analyzing the serial data to generate a device tag, the mechanism transmits the packed device tag actively to a server through a network. The server automatically generates a tag compliant with the Object Linking and Embedding for Process Control (OPC) according to the device tag for monitoring. The mechanism improves the compatibility and efficiency of monitoring and bandwidth usage.

Abstract: A method and an integrated routing device for controlling remote systems via short messages are provided. When a mobile communication device controls remote systems via short messages, the method and the integrated routing device verify whether the mobile communication device is a legal commander. When the mobile communication device is verified as a legal commander, the method and the integrated routing device generate a verification code and subtract consumed time caused by message relay from a first control duration to generate a second control duration. The mobile communication device performs remote control during the second control duration. By completing above procedure, the method and the integrated routing device are capable of preventing fatal damages resulted from missing the right timing for executing control commands, and can further improve the efficiency of controlling remote systems via short messages.

Abstract: An active monitoring system for serial monitoring devices and the method thereof are provided. By receiving serial data from a serial monitoring device on a triggering device and analyzing the serial data to generate a device tag, the mechanism transmits the packed device tag actively to a server through a network. The server automatically generates a tag compliant with the Object Linking and Embedding for Process Control (OPC) according to the device tag for monitoring. The mechanism improves the compatibility and efficiency of monitoring and bandwidth usage.

Abstract: An active monitoring system and method thereof are provided to solve the problems of no real-time monitoring and bandwidth usage in the prior art. A triggering end detects a monitoring device to generate a device tag. The device tag is packed and actively sent to the server end via a network. The server end automatically generates an OPC tag for an integrating server to use. The mechanism can increase monitoring efficiency and bandwidth usage.

Abstract: An active monitoring system and method thereof are provided to solve the problems of no real-time monitoring and bandwidth usage in the prior art. A triggering end detects a monitoring device to generate a device tag. The device tag is packed and actively sent to the server end via a network. The server end automatically generates an OPC tag for an integrating server to use. The mechanism can increase monitoring efficiency and bandwidth usage.