Patents by Inventor Kuan-Wen Lu

Kuan-Wen Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High voltage semiconductor device and fabricating method thereof
    Patent number: 8742498
    Abstract: A method for fabricating a high voltage semiconductor device is provided. Firstly, a substrate is provided, wherein the substrate has a first active zone and a second active zone. Then, a first ion implantation process is performed to dope the substrate by a first mask layer, thereby forming a first-polarity doped region at the two ends of the first active zone and a periphery of the second active zone. After the first mask layer is removed, a second ion implantation process is performed to dope the substrate by a second mask layer, thereby forming a second-polarity doped region at the two ends of the second active zone and a periphery of the first active zone. After the second mask layer is removed, a first gate conductor structure and a second gate conductor structure are formed over the middle segments of the first active zone and the second active zone, respectively.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Fu-Chun Chien, Ching-Wei Teng, Nien-Chung Li, Chih-Chung Wang, Te-Yuan Wu, Li-Che Chen, Chih-Chun Pu, Yu-Ting Yeh, Kuan-Wen Lu
  • HIGH VOLTAGE SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
    Publication number: 20130113048
    Abstract: A method for fabricating a high voltage semiconductor device is provided. Firstly, a substrate is provided, wherein the substrate has a first active zone and a second active zone. Then, a first ion implantation process is performed to dope the substrate by a first mask layer, thereby forming a first-polarity doped region at the two ends of the first active zone and a periphery of the second active zone. After the first mask layer is removed, a second ion implantation process is performed to dope the substrate by a second mask layer, thereby forming a second-polarity doped region at the two ends of the second active zone and a periphery of the first active zone. After the second mask layer is removed, a first gate conductor structure and a second gate conductor structure are formed over the middle segments of the first active zone and the second active zone, respectively.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Fu-Chun CHIEN, Ching-Wei Teng, Nien-Chung Li, Chih-Chung Wang, Te-Yuan Wu, Li-Che Chen, Chih-Chun Pu, Yu-Ting Yeh, Kuan-Wen Lu