Patents by Inventor Kuan Yen Tan

Kuan Yen Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985908
    Abstract: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage N?/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, ? is the energy gap in the superconductor density of states, and e is the elementary charge.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 14, 2024
    Assignee: IQM Finland Oy
    Inventors: Mikko Möttönen, Kuan Yen Tan, Matti Partanen
  • Publication number: 20240071944
    Abstract: The invention relates to the field of chip fabrication, in particular to the fabrication of superconducting integrated circuits for use in quantum computers. Raised and recessed alignment structures are provided on the surfaces of two substrate such that the raised and recessed alignment structure extends within the recessed alignment structure to a maximum depth determined by the geometry of the alignment structures. The alignment structures act as a hard stop for positioning and aligning the substrates for flip chip bonding.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Máté JENEI, Kok Wai Chan, Kuan Yen Tan
  • Patent number: 11907805
    Abstract: A three-dimensional superconducting qubit and a method for manufacturing the same are disclosed. In an example, a three-dimensional superconducting qubit comprises a structural base comprising one or more insulating materials, and superconductive patterns on surfaces of the structural base. The superconductive patterns form at least a capacitive part and an inductive part of the three-dimensional superconducting qubit. A first surface of the surfaces of the structural base defines a first plane and a second surface of the surfaces of the structural base defines a second plane, the second plane being oriented differently than the first plane. At least one superconductive pattern of the superconductive patterns extends from the first surface to the second surface.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: February 20, 2024
    Assignee: IQM Finland Oy
    Inventors: Caspar Ockeloen-Korppi, Tianyi Li, Wei Liu, Vasilii Sevriuk, Tiina Naaranoja, Mate Jenei, Jan Goetz, Kuan Yen Tan, Mikko Möttönen, Kok Wai Chan
  • Patent number: 11621388
    Abstract: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: April 4, 2023
    Assignee: IQM Finland Oy
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan, Kuan Yen Tan
  • Publication number: 20220181537
    Abstract: It is an objective to provide an arrangement and a quantum computing system for qubit readout. According to an embodiment, an arrangement for qubit readout includes at least one qubit and a controllable energy relaxation structure comprising at least one junction. The controllable energy relaxation structure is coupled to the at least one qubit, and is configured to absorb, in response to a control signal, at least one photon from the at least one qubit via photon-assisted tunnelling of a charge through the at least one junction. The arrangement also includes a charge storage configured to store the tunnelled charge and a charge sensing structure coupled to the charge storage. The charge sensing structure is configured to provide a readout signal in response to detecting the tunnelled charge in the charge storage.
    Type: Application
    Filed: August 19, 2021
    Publication date: June 9, 2022
    Inventors: Juha Hassel, Vasilii Sevriuk, Johannes Heinsoo, Kuan Yen Tan, Mikko Möttönen, Hao Hsu
  • Publication number: 20220181538
    Abstract: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 9, 2022
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan, Kuan Yen Tan
  • Publication number: 20220164690
    Abstract: A three-dimensional superconducting qubit and a method for manufacturing the same are disclosed. In an example, a three-dimensional superconducting qubit comprises a structural base comprising one or more insulating materials, and superconductive patterns on surfaces of the structural base. The superconductive patterns form at least a capacitive part and an inductive part of the three-dimensional superconducting qubit. A first surface of the surfaces of the structural base defines a first plane and a second surface of the surfaces of the structural base defines a second plane, the second plane being oriented differently than the first plane. At least one superconductive pattern of the superconductive patterns extends from the first surface to the second surface.
    Type: Application
    Filed: October 6, 2021
    Publication date: May 26, 2022
    Inventors: Caspar Ockeloen-Korppi, Tianyi Li, Wei Liu, Vasilii Sevriuk, Tiina Naaranoja, Mate Jenei, Jan Goetz, Kuan Yen Tan, Mikko Möttönen, Kok Wai Chan
  • Publication number: 20220138609
    Abstract: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage N?/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, ? is the energy gap in the superconductor density of states, and e is the elementary charge.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 5, 2022
    Applicant: IQM Finland Oy
    Inventors: Mikko MOTTONEN, Kuan Yen TAN, Matti PARTANEN
  • Publication number: 20220012617
    Abstract: A quantum computing circuit is disclosed herein. An example quantum computing circuit includes a first chip with at least one qubit thereon. The quantum computing circuit also includes a second chip with at least other quantum circuit elements other than qubits thereon. The first chip and the second chip are stacked together in a flip-chip configuration and attached to each other with bump bonding that includes bonding bumps.
    Type: Application
    Filed: December 31, 2020
    Publication date: January 13, 2022
    Inventors: Juha Hassel, Wei Liu, Vasilii Sevriuk, Johannes Heinsoo, Mate Jenei, Manjunath Venkatesh, Tianyi Li, Kok Wai Chan, Kuan Yen Tan, Mikko Möttönen
  • Publication number: 20210406750
    Abstract: A method, system, and arrangement for resetting qubits are disclosed. An example system includes one or more quantum circuit refrigerators for resetting qubits. Each of the quantum circuit refrigerators includes a tunneling junction and a control input for receiving a control signal. Photon-assisted single-electron tunneling takes place across the respective tunneling junction in response to a control signal. Capacitive or inductive coupling elements between the qubits and the quantum circuit refrigerators couple each qubit to the quantum circuit refrigerator(s). The qubits, quantum circuit refrigerators, and coupling elements are located in a cryogenically cooled environment. A common control signal line to the control inputs crosses into the cryogenically cooled environment from a room temperature environment.
    Type: Application
    Filed: November 3, 2020
    Publication date: December 30, 2021
    Inventors: Tianyi Li, Kok Wai Chan, Kuan Yen Tan, Jan Goetz, Mikko Möttönen
  • Patent number: 11210601
    Abstract: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage N?/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, ? is the energy gap in the superconductor density of states, and e is the elementary charge.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: December 28, 2021
    Assignee: IQM Finland Oy
    Inventors: Mikko Möttönen, Kuan Yen Tan, Matti Partanen
  • Publication number: 20200272925
    Abstract: A circuit assembly for cooling a quantum electrical device, use of said circuit assembly, a system and a method for cooling a quantum electric device are provided. The circuit assembly comprises a quantum electric device to be cooled, at least one normal-metal-insulator-superconductor (NIS) tunnel junction electrically connected to the quantum electric device and at least one superconductive lead for supplying a drive voltage VQCR for said at least one NIS tunnel junction. The quantum electric device is cooled when the voltage VQCR is supplied to at least one NIS tunnel junction, said voltage VQCR being equal to or below the voltage N?/e, where N=1 or N=2, N is the number of NIS tunnel junctions electrically coupled in series with the means for generating the voltage, ? is the energy gap in the superconductor density of states, and e is the elementary charge.
    Type: Application
    Filed: December 27, 2016
    Publication date: August 27, 2020
    Applicant: IQM Finland Oy
    Inventors: Mikko MÖTTÖNEN, Kuan Yen Tan, Matti Partanen