Abstract: The present disclosure provides a method for fabricating an image sensor. The method includes the following operations. A cavity is formed at a first surface of a substrate. A germanium layer is formed in the cavity. A first heavily doped region is formed in the germanium layer by an implantation operation. A second heavily doped region is formed at a position proximal to a top surface of the germanium layer, wherein the second heavily doped region is laterally surrounded by the first heavily doped region from a top view perspective. An interconnect structure is formed over the germanium layer.

Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Abstract: A system performs a method of adaptive voltage scaling. The method includes generating a voltage adjustment signal based on a hint from a frequency-locked loop (FLL). The FLL includes an oscillator that generates a clock signal at a clock frequency. The voltage adjustment signal is sent to a power management unit (PMU) to cause the PMU to supply an adjusted operating voltage to the FLL. The method further includes updating a minimum code set according to the adjusted operating voltage and an operating temperature. The clock frequency of the oscillator is generated to match a target frequency according to the adjusted operating voltage and a code determined by the FLL from the minimum code set.

Abstract: A lighting device includes a light board and a light dimmer circuit. The light board includes multiple first light emitting elements and second light emitting elements. The first light emitting elements are disposed in a first area of the light board. The second light emitting elements are disposed in a second area of the light board. The light dimmer circuit is configured to drive the second light emitting elements to generate flickering lights from the second area of the light board, and is configured to drive the first light emitting elements to generate non-flickering lights from the first area of the light board.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.

Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.

Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.

Abstract: A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.

Abstract: A surface modified nanoparticle includes a nanoparticle and a phenol compound used for modifying the nanoparticle. The phenol compound has a formula of (a) or (b), wherein n=1˜9, X is selected from the group consisted of NH2, OH, PH4, COOH and SH, R1 is selected from the group consisted of C1-C5 alkyl group, aryl group, alkenyl group, alkynyl group, alkylamino group and alkoxy group. Each carbon atom of the phenol group may be independently substituted or non-substituted. The substituent of the carbon atom of the phenol may be selected from the group consisted of halogen, C1-C5 alkyl group, cyano (CN), trifluoromethyl (CF3), alkylamino group, amino and alkoxy group. The present invention may be used for anti-oxidant and/or decreasing the toxicity of the nanoparticle. A preparation method of surface modified nanoparticle is also herein provided.

Abstract: A surface modified nanoparticle includes a nanoparticle and a phenol compound used for modifying the nanoparticle. The phenol compound has a formula of (a) or (b), wherein n=1˜9, X is selected from the group consisted of NH2, OH, PH4, COOH and SH, R1 is selected from the group consisted of C1-C5 alkyl group, aryl group, alkenyl group, alkynyl group, alkylamino group and alkoxy group. Each carbon atom of the phenol group may be independently substituted or non-substituted. The substituent of the carbon atom of the phenol may be selected from the group consisted of halogen, C1-C5 alkyl group, cyano (CN), trifluoromethyl (CF3), alkylamino group, amino and alkoxy group. The present invention may be used for anti-oxidant and/or decreasing the toxicity of the nanoparticle. A preparation method of surface modified nanoparticle is also herein provided.