Abstract: A display device includes a first substrate, and a semiconductor layer, and a gate line disposed over the first substrate. The gate line overlaps the semiconductor layer. The display device also includes a first insulating layer disposed over the semiconductor layer, wherein a first opening is formed through the first insulating layer. The display device further includes a metal pad disposed over the first insulating layer, being electrically connected to the semiconductor layer through the first opening, and a data line disposed over the first insulating layer, wherein the data line crosses the gate line and is electrically connected to the metal pad. In addition, the display device includes a second insulating layer disposed over the metal pad and the first insulating layer, wherein a second opening is formed through the second insulating layer, and the second opening at least partially overlaps the gate line.

Abstract: A display device includes a first substrate, and a semiconductor layer, and a gate line disposed over the first substrate. The gate line overlaps the semiconductor layer. The display device also includes a first insulating layer disposed over the semiconductor layer, wherein a first opening is formed through the first insulating layer. The display device further includes a metal pad disposed over the first insulating layer, being electrically connected to the semiconductor layer through the first opening, and a data line disposed over the first insulating layer, wherein the data line crosses the gate line and is electrically connected to the metal pad. In addition, the display device includes a second insulating layer disposed over the metal pad and the first insulating layer, wherein a second opening is formed through the second insulating layer, and the second opening at least partially overlaps the gate line.

Abstract: A wireless charging coil with a high Q factor includes a plurality of wire groups. Each of the wire groups includes a plurality of wires, a self-bonding film and a plurality of insulation layers. The wires are spun together in a helical manner to form a self-woven structure of the wire group. The self-bonding film surrounds the plurality of wires, and each of the insulation layers covers a surface of a wire. The plurality of wire groups together are wound into a plurality of turns on a same winding surface, and all of the plurality of wire groups are wound on the same winding surface. Each turn is wound by the plurality of wire groups.

Abstract: A display device includes an array substrate defined with a plurality of pixel structures arranged in an array. Each of the pixel structures includes a semiconductor layer disposed over a substrate and a first metal layer disposed over the substrate. The pixel structure includes a first insulating layer disposed over the semiconductor layer, having a first opening exposing a top surface of the semiconductor layer and a sidewall surface of the first insulating layer. The pixel structure includes a metal pad disposed over the first insulating layer, being formed over the top surface of the semiconductor layer and the sidewall surface of the first insulating layer through the first opening. The pixel structure includes a second insulating layer disposed over the metal pad and the first insulating layer, having a second opening exposing the metal pad over the sidewall surface of the first insulating layer.

Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.

Abstract: A touch panel including a substrate, first bridge electrodes, first transparent electrodes, an insulation layer, first sensing electrodes, second bridge electrodes, and second sensing electrodes is provided. Two neighboring first transparent electrodes cover two ends of each first bridge electrode and are electrically connected to the first bridge electrode. Each first transparent electrode has an overlapping region and a non-overlapping region. The insulation layer has openings. Two neighboring openings expose the non-overlapping regions of the first transparent electrodes. Two neighboring first sensing electrodes are filled in the openings and are electrically connected to each other through the first transparent electrodes and the first bridge electrodes, so as to form a first sensing electrode series. The second bridge electrodes cross the first bridge electrodes.

Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.

Abstract: A display device includes a first substrate and an insulating layer over the first substrate. The display device further includes a semiconductor layer over the insulating layer and a dielectric layer over the semiconductor layer, having an opening partially exposing the semiconductor layer and the insulating layer, wherein the opening has a first width along a first direction. In addition, the display device further includes a conductive line extending over the dielectric layer along a second direction that is different from the first direction and filling the opening to electrically connect to the semiconductor layer exposed by the opening. The conductive line includes a first portion over a top surface of the dielectric layer and a second portion in the opening. The first portion of the conductive line has a second width along the first direction. The first width is greater than the second width.

Abstract: A display device includes an array substrate defined with a plurality of pixel structures arranged in an array. Each of the pixel structures includes a semiconductor layer disposed over a substrate and a first metal layer disposed over the substrate. The pixel structure includes a first insulating layer disposed over the semiconductor layer, having a first opening exposing a top surface of the semiconductor layer and a sidewall surface of the first insulating layer. The pixel structure includes a metal pad disposed over the first insulating layer, being formed over the top surface of the semiconductor layer and the sidewall surface of the first insulating layer through the first opening. The pixel structure includes a second insulating layer disposed over the metal pad and the first insulating layer, having a second opening exposing the metal pad over the sidewall surface of the first insulating layer.

Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.

Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.

Abstract: A display device includes a first substrate and an insulating layer over the first substrate. The display device further includes a semiconductor layer over the insulating layer and a dielectric layer over the semiconductor layer, having an opening partially exposing the semiconductor layer and the insulating layer, wherein the opening has a first width along a first direction. In addition, the display device further includes a conductive line extending over the dielectric layer along a second direction that is different from the first direction and filling the opening to electrically connect to the semiconductor layer exposed by the opening. The conductive line includes a first portion over a top surface of the dielectric layer and a second portion in the opening. The first portion of the conductive line has a second width along the first direction. The first width is greater than the second width.

Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.

Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.

Abstract: An omnidirectional lighting unit is disclosed, which includes a light-emitting chip, a spherical package member, a diffusion layer, and two conductive structures. The light-emitting chip has a positive electrode and a negative electrode. The spherical package member encapsulates the light-emitting chip, and the diffusion layer covers an outer surface of the spherical package member. The two conductive structures are electrically connected to the positive and negative electrodes, respectively, and each of the two conductive structures penetrates through the spherical package member and the diffusion layer outwardly, such that a portion of each conductive structure is exposed the exterior of the diffusion layer.

Abstract: A light emitting diode packaging structure provided in the invention includes a base, a plurality of lead frames, a LED chip, a thermal conductive film and an encapsulating member. The base includes a reflective recess and a plurality of outer surfaces surrounding the reflective recess. The lead frames are respectively disposed on the base, and exposed from the reflective recess. The LED chip is disposed on one of the lead frames in the reflective recess The thermal conductive film is with a light shielding property, and covers all inner surfaces of the reflective recess and at least one of the outer surfaces of the base. The encapsulating member is disposed in the reflective recess to cover the thermal conductive film and the LED chip.